Patents by Inventor Emy Tan

Emy Tan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • M-level diode junction temperature measurement method cancelling series and parallel parasitic influences
    Patent number: 6554470
    Abstract: The present invention provides an improved method and apparatus to measure p-n junction device temperature by testing a device with M-Levels of applied collector current, sensing changes in output characteristics, and calculating the device current offset error and leakage current error due to parasitic parallel resistance where the leakage current error due to parasitic parallel resistance may be treated and eliminated as current offset error. Application of M levels of excitation values, where M is greater than or equal to four, eliminates device series parasitic effects, comprised of voltage offset and a series parasitic resistance, and parallel parasitic effects, comprised of current offset error and leakage current error due to parasitic parallel resistance, from temperature measurements.
    Type: Grant
    Filed: October 26, 2001
    Date of Patent: April 29, 2003
    Assignee: Maxim Integrated Products, Inc.
    Inventors: Hong Zhang, William Robert Rypka, Emy Tan, Mansour Izadinia
  • M-level diode junction temperature measurement method cancelling series and parallel parasitic influences
    Publication number: 20030031229
    Abstract: The present invention provides an improved method and apparatus to measure p-n junction device temperature by testing a device with M-Levels of applied collector current, sensing changes in output characteristics, and calculating the device current offset error and leakage current error due to parasitic parallel resistance where the leakage current error due to parasitic parallel resistance may be treated and eliminated as current offset error. Application of M levels of excitation values, where M is greater than or equal to four, eliminates device series parasitic effects, comprised of voltage offset and a series parasitic resistance, and parallel parasitic effects, comprised of current offset error and leakage current error due to parasitic parallel resistance, from temperature measurements.
    Type: Application
    Filed: October 26, 2001
    Publication date: February 13, 2003
    Inventors: Hong Zhang, William Robert Rypka, Emy Tan, Mansour Izadinia