Patents by Inventor En Chan Chen
En Chan Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Publication number: 20230192476Abstract: A MEMS device includes a first multi-layer structure, a second multi-layer structure over the first multi-layer structure, a first semiconductor layer between the first and second multilayer structures, a first air gap separating the first multi-layer structure and the first semiconductor layer, a second air gap separating the first semiconductor layer and the second multi-layer structure, a plurality of semiconductor pillars, and a plurality of second semiconductor pillars. The first semiconductor pillars are exposed to the first air gap, and coupled to the first semiconductor layer and the first multi-layer structure. The second semiconductor pillars are exposed to the second air gap, and coupled to the first semiconductor layer and the second multi-layer structure.Type: ApplicationFiled: February 12, 2023Publication date: June 22, 2023Inventors: CHEN HSIUNG YANG, CHUN-WEN CHENG, CHIA-HUA CHU, EN-CHAN CHEN
-
Patent number: 11577954Abstract: A method for forming a MEMS device includes following operations. A first semiconductor layer is formed over a substrate. A plurality of first pillars are formed over the first layer. A second layer is formed over the first pillars and the first layer. A plurality of second pillars are formed over the second layer. A third layer is formed over the second pillars and the second layer.Type: GrantFiled: December 7, 2020Date of Patent: February 14, 2023Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.Inventors: Chen Hsiung Yang, Chun-Wen Cheng, Chia-Hua Chu, En-Chan Chen
-
Patent number: 11206493Abstract: A micro electro mechanical system (MEMS) microphone includes a first membrane, a second membrane, a third membrane disposed between the first membrane and the second membrane, a first cavity disposed between the first membrane and the third membrane and surrounded by a first wall, a second cavity disposed between the second membrane and the third membrane and surrounded by a second wall, and one or more first supports disposed in the first cavity and connecting the first membrane and the third membrane.Type: GrantFiled: October 29, 2018Date of Patent: December 21, 2021Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Chen Hsiung Yang, Chun-Wen Cheng, Chia-Hua Chu, En-Chan Chen
-
Publication number: 20210087052Abstract: A method for forming a MEMS device includes following operations. A first semiconductor layer is formed over a substrate. A plurality of first pillars are formed over the first layer. A second layer is formed over the first pillars and the first layer. A plurality of second pillars are formed over the second layer. A third layer is formed over the second pillars and the second layer.Type: ApplicationFiled: December 7, 2020Publication date: March 25, 2021Inventors: CHEN HSIUNG YANG, CHUN-WEN CHENG, CHIA-HUA CHU, EN-CHAN CHEN
-
Patent number: 10865099Abstract: A MEMS device includes a first layer and a second layer including a same material, a third layer disposed between the first layer and the second layer, a first air gap separating the first layer and the third layer, a second air gap separating the second layer and the third layer, a plurality of first pillars exposed to the first air gap and arranged in contact with the first layer and the third layer, a plurality of second pillars exposed to the second air gap and arranged in contact with the second layer and the third layer.Type: GrantFiled: August 29, 2018Date of Patent: December 15, 2020Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.Inventors: Chen Hsiung Yang, Chun-Wen Cheng, Chia-Hua Chu, En-Chan Chen
-
Patent number: 10793426Abstract: A microelectromechanical system structure and a method for fabricating the same are provided. A method for fabricating a MEMS structure includes the following steps. A first substrate is provided, wherein a transistor, a first dielectric layer and an interconnection structure are formed thereon. A second substrate is provided, wherein a second dielectric layer and a thermal stability layer are formed on the second substrate. The first substrate is bonded to the second substrate, and the second substrate removed. A conductive layer is formed within the second dielectric layer and electrically connected to the interconnection structure. The thermal stability layer is located between the conductive layer and the interconnection structure. A growth temperature of a material of the thermal stability layer is higher than a growth temperature of a material of the conductive layer and a growth temperature of a material of the interconnection structure.Type: GrantFiled: August 21, 2018Date of Patent: October 6, 2020Assignee: UNITED MICROELECTRONICS CORP.Inventors: Chang-Sheng Hsu, Chih-Fan Hu, Chia-Wei Lee, En Chan Chen, Shih-Wei Li
-
Publication number: 20200071157Abstract: A MEMS device includes a first layer and a second layer including a same material, a third layer disposed between the first layer and the second layer, a first air gap separating the first layer and the third layer, a second air gap separating the second layer and the third layer, a plurality of first pillars exposed to the first air gap and arranged in contact with the first layer and the third layer, a plurality of second pillars exposed to the second air gap and arranged in contact with the second layer and the third layer.Type: ApplicationFiled: August 29, 2018Publication date: March 5, 2020Inventors: CHEN HSIUNG YANG, CHUN-WEN CHENG, CHIA-HUA CHU, EN-CHAN CHEN
-
Publication number: 20190306633Abstract: A micro electro mechanical system (MEMS) microphone includes a first membrane, a second membrane, a third membrane disposed between the first membrane and the second membrane, a first cavity disposed between the first membrane and the third membrane and surrounded by a first wall, a second cavity disposed between the second membrane and the third membrane and surrounded by a second wall, and one or more first supports disposed in the first cavity and connecting the first membrane and the third membrane.Type: ApplicationFiled: October 29, 2018Publication date: October 3, 2019Inventors: Chen Hsiung YANG, Chun-Wen CHENG, Chia-Hua CHU, En-Chan CHEN
-
Publication number: 20180354783Abstract: A microelectromechanical system structure and a method for fabricating the same are provided. A method for fabricating a MEMS structure includes the following steps. A first substrate is provided, wherein a transistor, a first dielectric layer and an interconnection structure are formed thereon. A second substrate is provided, wherein a second dielectric layer and a thermal stability layer are formed on the second substrate. The first substrate is bonded to the second substrate, and the second substrate removed. A conductive layer is formed within the second dielectric layer and electrically connected to the interconnection structure. The thermal stability layer is located between the conductive layer and the interconnection structure. A growth temperature of a material of the thermal stability layer is higher than a growth temperature of a material of the conductive layer and a growth temperature of a material of the interconnection structure.Type: ApplicationFiled: August 21, 2018Publication date: December 13, 2018Applicant: United Microelectronics Corp.Inventors: Chang-Sheng Hsu, Chih-Fan Hu, Chia-Wei Lee, En Chan Chen, Shih-Wei Li
-
Patent number: 10087072Abstract: A microelectromechanical system structure and a method for fabricating the same are provided. A method for fabricating a MEMS structure includes the following steps. A first substrate is provided, wherein a transistor, a first dielectric layer and an interconnection structure are formed thereon. A second substrate is provided, wherein a second dielectric layer and a thermal stability layer are formed on the second substrate. The first substrate is bonded to the second substrate, and the second substrate removed. A conductive layer is formed within the second dielectric layer and electrically connected to the interconnection structure. The thermal stability layer is located between the conductive layer and the interconnection structure. A growth temperature of a material of the thermal stability layer is higher than a growth temperature of a material of the conductive layer and a growth temperature of a material of the interconnection structure.Type: GrantFiled: May 4, 2016Date of Patent: October 2, 2018Assignee: United Microelectronics Corp.Inventors: Chang-Sheng Hsu, Chih-Fan Hu, Chia-Wei Lee, En Chan Chen, Shih-Wei Li
-
Patent number: 9961450Abstract: A piezoresistive microphone includes a substrate, an insulating layer, and a polysilicon layer. A first pattern is disposed within the polysilicon layer. The first pattern includes numerous first opening. A second pattern is disposed within the polysilicon layer. The second pattern includes numerous second openings. The first pattern surrounds the second pattern. Each first opening and each second opening are staggered. A first resistor is disposed in the polysilicon and between the first pattern and the second pattern. The first resistor is composed of numerous first heavily doped regions and numerous first lightly doped regions. The first heavily doped regions and the first lightly doped regions are disposed in series. The first heavily doped region and the first lightly doped region are disposed alternately. A cavity is disposed in the insulating layer and the substrate.Type: GrantFiled: August 25, 2016Date of Patent: May 1, 2018Assignee: UNITED MICROELECTRONICS CORP.Inventors: Chang-Sheng Hsu, Weng-Yi Chen, En-Chan Chen, Shih-Wei Li, Guo-Chih Wei
-
Publication number: 20180027337Abstract: A piezoresistive microphone includes a substrate, an insulating layer, and a polysilicon layer. A first pattern is disposed within the polysilicon layer. The first pattern includes numerous first opening. A second pattern is disposed within the polysilicon layer. The second pattern includes numerous second openings. The first pattern surrounds the second pattern. Each first opening and each second opening are staggered. A first resistor is disposed in the polysilicon and between the first pattern and the second pattern. The first resistor is composed of numerous first heavily doped regions and numerous first lightly doped regions. The first heavily doped regions and the first lightly doped regions are disposed in series. The first heavily doped region and the first lightly doped region are disposed alternately. A cavity is disposed in the insulating layer and the substrate.Type: ApplicationFiled: August 25, 2016Publication date: January 25, 2018Inventors: Chang-Sheng Hsu, Weng-Yi Chen, En-Chan Chen, Shih-Wei Li, Guo-Chih Wei
-
Publication number: 20170320727Abstract: A microelectromechanical system structure and a method for fabricating the same are provided. A method for fabricating a MEMS structure includes the following steps. A first substrate is provided, wherein a transistor, a first dielectric layer and an interconnection structure are formed thereon. A second substrate is provided, wherein a second dielectric layer and a thermal stability layer are formed on the second substrate. The first substrate is bonded to the second substrate, and the second substrate removed. A conductive layer is formed within the second dielectric layer and electrically connected to the interconnection structure. The thermal stability layer is located between the conductive layer and the interconnection structure. A growth temperature of a material of the thermal stability layer is higher than a growth temperature of a material of the conductive layer and a growth temperature of a material of the interconnection structure.Type: ApplicationFiled: May 4, 2016Publication date: November 9, 2017Inventors: Chang-Sheng Hsu, Chih-Fan Hu, Chia-Wei Lee, En Chan Chen, Shih-Wei Li