Patents by Inventor En-Wei TSUI

En-Wei TSUI has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Wafer backside defect detection method and wafer backside defect detection apparatus
    Patent number: 11821847
    Abstract: A wafer backside defect detection method and a wafer backside defect detection apparatus are provided. The wafer backside defect detection method includes the following steps. A peripheral edge area of a wafer backside image that at least one notch is located is cropped off. Adjacent white pixels on the wafer backside image are connected to obtain a plurality of abnormal regions. If a total area of top N of the abnormal regions is more than 10% of an area of the wafer, it is deemed that the wafer has a roughness defect. N is a natural number. If the total area of the top N of the abnormal regions is less than 1% of the area of the wafer and a largest abnormal region of the abnormal regions is longer than a predetermined length, it is deemed that the wafer has a scratch defect.
    Type: Grant
    Filed: July 20, 2021
    Date of Patent: November 21, 2023
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Cheng-Hsien Chen, Chia-Feng Hsiao, Chung-Hsuan Wu, Chen-Hui Huang, Nai-Ying Lo, En-Wei Tsui, Yung-Yu Yang, Chen-Hsuan Hung
  • WAFER BACKSIDE DEFECT DETECTION METHOD AND WAFER BACKSIDE DEFECT DETECTION APPARATUS
    Publication number: 20230024259
    Abstract: A wafer backside defect detection method and a wafer backside defect detection apparatus are provided. The wafer backside defect detection method includes the following steps. A peripheral edge area of a wafer backside image that at least one notch is located is cropped off. Adjacent white pixels on the wafer backside image are connected to obtain a plurality of abnormal regions. If a total area of top N of the abnormal regions is more than 10% of an area of the wafer, it is deemed that the wafer has a roughness defect. N is a natural number. If the total area of the top N of the abnormal regions is less than 1% of the area of the wafer and a largest abnormal region of the abnormal regions is longer than a predetermined length, it is deemed that the wafer has a scratch defect.
    Type: Application
    Filed: July 20, 2021
    Publication date: January 26, 2023
    Inventors: Cheng-Hsien CHEN, Chia-Feng HSIAO, Chung-Hsuan WU, Chen-Hui HUANG, Nai-Ying LO, En-Wei TSUI, Yung-Yu YANG, Chen-Hsuan HUNG