Patents by Inventor Endrianto Djajadi

Endrianto Djajadi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7468687
    Abstract: A problem is overcome in that when a signal is input and output in an analog signal format between two blocks for executing digital signal processing, a dynamic range is made improper by the dispersion of errors of the signal levels in a D/A converter and an A/D converter in the blocks. A gain is set such that the minimum value within the range of dispersion of errors of the signal level of a D/A converter 12 of a DSP 1 in a former stage is made larger than the maximum value within the range of dispersion of errors of the signal level of an A/D converter 21 in a latter stage. Then, the gain value of a second GCA 13 is set such that the level of a signal S5 is set to a maximum value within the range less than a prescribed value Vdr in a state that a signal having a level treated as a predetermined maximum value in the DSP 1 is input to the first GCA 13.
    Type: Grant
    Filed: June 22, 2005
    Date of Patent: December 23, 2008
    Assignee: Sony Corporation
    Inventors: Kazuhiro Nozawa, Endrianto Djajadi
  • Publication number: 20080150775
    Abstract: A problem that when signal input/output is conducted in an analogue signal format between two portions processing digital signals, the dynamic range becomes inadequate due to error variations of signal levels of an internal D/A converter and A/D converter is solved. In a gain setting, firstly the magnitude relation is so set that a minimum value in a signal level error variation range of a D/A converter (12) in a front stage DSP (1) is greater than a maximum value in a signal level error variation range of an A/D converter (21) in a rear stage signal processing block. Secondly, in a state that a signal having the level handled as a predetermined maximum value in the DSP (1) is inputted to a first GCA (13), the gain value of the first GCA (13) is so set that the level of a signal S5 is the maximum in a range of below a prescribed value Vdr. Thirdly, the gain value of a second GCA (24) is so set that the level of the signal S5 is the maximum in a range of equal or less than a prescribed value.
    Type: Application
    Filed: June 22, 2005
    Publication date: June 26, 2008
    Inventors: Kazuhiro Nozawa, Endrianto Djajadi