Patents by Inventor Enes Ugur

Enes Ugur has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • SEMICONDUCTOR DEVICES HAVING ASYMMETRIC INTEGRATED LUMPED GATE RESISTORS FOR BALANCED TURN-ON/TURN-OFF BEHAVIOR AND/OR MULTIPLE SPACED-APART LUMPED GATE RESISTORS FOR IMPROVED POWER HANDLING
    Publication number: 20230023195
    Abstract: Power semiconductor devices comprise a wide bandgap semiconductor layer structure, a gate pad on the wide bandgap semiconductor layer structure, a plurality of gate fingers on the wide bandgap semiconductor layer structure, and a plurality of lumped gate resistors electrically coupled between the gate pad and the gate fingers.
    Type: Application
    Filed: June 17, 2022
    Publication date: January 26, 2023
    Inventors: Enes Ugur, Sei-Hyung Ryu, In-Hwan Ji, Jae-Hyung Park, Edward Van Brunt
  • Methods of determining operating conditions of silicon carbide power MOSFET devices associated with aging, related circuits and computer program products
    Patent number: 11474145
    Abstract: Embodiments according to the invention can provide methods of testing a SiC MOSFET, that can include applying first and second voltage levels across a gate-source junction of a SiC MOSFET and measuring first and second voltage drops across a reverse body diode included in the SiC MOSFET responsive to the first and second voltage levels, respectively, to provide an indication of a degradation of a gate oxide of the SiC MOSFET and an indication of contact resistance of the SiC MOSFET, respectively.
    Type: Grant
    Filed: June 10, 2020
    Date of Patent: October 18, 2022
    Assignee: Board of Regents, The University of Texas System
    Inventors: Enes Ugur, Bilal Akin, Fei Yang, Shi Pu, Chi Xu
  • Methods of monitoring conditions associated with aging of silicon carbide power MOSFET devices in-situ, related circuits and computer program products
    Patent number: 11397209
    Abstract: A method of monitoring a condition of a SiC MOSFET can include (a) applying a first test gate-source voltage across a gate-source of a SiC MOSFET in-situ, the first test gate-source voltage configured to operate the SiC MOSFET in saturation mode to generate a first drain current in the SiC MOSFET, (b) applying a second test gate-source voltage across the gate-source of the SiC MOSFET in-situ, the second test gate-source voltage configured to operate the SiC MOSFET in fully-on mode to generate a second drain current in the SiC MOSFET, (c) determining a drain-source saturation resistance using the first drain current to provide an indication of a degradation of a gate oxide of the SiC MOSFET; and (d) determining a drain-source on resistance using the second drain current to provide an indication of a degradation of contact resistance of the SiC MOSFET.
    Type: Grant
    Filed: June 10, 2020
    Date of Patent: July 26, 2022
    Assignee: Board of Regents, The University of Texas System
    Inventors: Bilal Akin, Shi Pu, Enes Ugur, Fei Yang, Chi Xu, Bhanu Teja Vankayalapati
  • METHODS OF DETERMINING OPERATING CONDITIONS OF SILICON CARBIDE POWER MOSFET DEVICES ASSOCIATED WITH AGING, RELATED CIRCUITS AND COMPUTER PROGRAM PRODUCTS
    Publication number: 20200408829
    Abstract: Embodiments according to the invention can provide methods of testing a SiC MOSFET, that can include applying first and second voltage levels across a gate-source junction of a SiC MOSFET and measuring first and second voltage drops across a reverse body diode included in the SiC MOSFET responsive to the first and second voltage levels, respectively, to provide an indication of a degradation of a gate oxide of the SiC MOSFET and an indication of contact resistance of the SiC MOSFET, respectively.
    Type: Application
    Filed: June 10, 2020
    Publication date: December 31, 2020
    Inventors: Enes Ugur, Bilal Akin, Fei Yang, Shi Pu, Chi Xu
  • METHODS OF MONITORING CONDITIONS ASSOCIATED WITH AGING OF SILICON CARBIDE POWER MOSFET DEVICES IN-SITU, RELATED CIRCUITS AND COMPUTER PROGRAM PRODUCTS
    Publication number: 20200400738
    Abstract: A method of monitoring a condition of a SiC MOSFET can include (a) applying a first test gate-source voltage across a gate-source of a SiC MOSFET in-situ, the first test gate-source voltage configured to operate the SiC MOSFET in saturation mode to generate a first drain current in the SiC MOSFET, (b) applying a second test gate-source voltage across the gate-source of the SiC MOSFET in-situ, the second test gate-source voltage configured to operate the SiC MOSFET in fully-on mode to generate a second drain current in the SiC MOSFET, (c) determining a drain-source saturation resistance using the first drain current to provide an indication of a degradation of a gate oxide of the SiC MOSFET; and (d) determining a drain-source on resistance using the second drain current to provide an indication of a degradation of contact resistance of the SiC MOSFET.
    Type: Application
    Filed: June 10, 2020
    Publication date: December 24, 2020
    Inventors: Bilal Akin, Shi Pu, Enes Ugur, Fei Yang, Chi Xu, Bhanu Teja Vankayalapati