Abstract: These present disclosure provides devices and techniques to dynamically change the operating frequency of an interface where components on the interface have non-common clocks. An interface component may be provided with a frequency negation component to negotiate a shift in an operating frequency with other component on an interface where the different component have non-common clocks.

Abstract: A hardware platform includes a nonvolatile storage device that can store system firmware as well as code for the primary operating system for the hardware platform. The hardware platform includes a controller that determines the hardware platform lacks functional firmware to boot the primary operating system from the storage device. The controller accesses a firmware image from an external interface that interfaces a device external to the hardware platform, where the external device is a firmware image source. The controller provisions the firmware from the external device to the storage device and initiates a boot sequence from the provisioned firmware.

Abstract: In an embodiment, a memory interface may send an indication that a request is being sent. The indication may be sent to a non-volatile memory via a point-to-point bus between a memory interface and the non-volatile memory. The memory interface may send the request to the non-volatile memory via the bus. The request may include an address that may be used to identify a location for storing or reading data. The non-volatile memory may acquire the request from the bus and process the request. After processing the request, the non-volatile memory may send an indication to the memory interface that indicates the non-volatile memory has a response to send to the memory interface. The memory interface may grant access to the bus to the non-volatile memory. After being granted access to the bus, the non-volatile memory may send the response to the memory interface.

Abstract: Provided are a computer readable storage media, method, and system for gathering sensed data from devices to manage host command transmission and cooling of the device. Host commands are retrieved from a host memory in a host to perform Input/Output operations with respect to a device. The retrieved host commands are transmitted to the device to perform the I/O operations of the host command. A monitor command is transmitted to obtain sensed data from the device while processing the host commands. A rate of transmitting the host commands is adjusted in response to determining that the sensed data received from the device in response to the monitor command satisfies a condition.

Abstract: An I/O interface supports scrambling, where the scrambling can include nonlinear scrambling of the scrambling code, or dynamic bus inversion of the scrambling code, or selective switching of selected bits of the scrambling code, or a combination of these. The transmitting device includes a scrambler and the receiving device includes a descrambler. Both the scrambler and the descrambler generate a linear feedback scrambling code modified by applying one or more of the techniques mentioned above. The modified scrambling code may cause fewer than half of the scrambled output bits to be toggled with respect to a previous scrambled output. The scrambler applies the modified scrambling code to a signal to transmit. The descrambler applies the modified scrambling code to a received signal.

Abstract: Apparatus, systems, and methods to manage memory latency operations are described. In one embodiment, an electronic device comprises a processor and a memory control logic to receive data from a remote memory device, store the data in a local cache memory, receive an error correction code indicator associated with the data, and implement a data management policy in response to the error correction code indicator. Other embodiments are also disclosed and claimed.

Abstract: A hardware platform includes a nonvolatile storage device that can store system firmware as well as code for the primary operating system for the hardware platform. The hardware platform includes a controller that determines the hardware platform lacks functional firmware to boot the primary operating system from the storage device. The controller accesses a firmware image from an external interface that interfaces a device external to the hardware platform, where the external device is a firmware image source. The controller provisions the firmware from the external device to the storage device and initiates a boot sequence from the provisioned firmware.

Abstract: Embodiments of the invention describe methods, apparatuses and systems for providing an efficient low power exit sequence for peripheral devices. In embodiments of the invention, a signal from a host device is transmitted to a SATA peripheral device for exiting a low-power state. An initialization time for OOB transmission and reception logic of the SATA peripheral device is tracked, and a reference time value based on the tracked initialization time is stored. In subsequent transitions from said low-power state, the reference time value for waking a host physical layer is utilized, thereby improving the efficiency of the management and use of said low power state. In some embodiments, the above described tracked initialization comprises a time from a transmission of an OOB signal (from the host to the peripheral device) to receiving an OOB response at the host device from the SATA peripheral device.

Abstract: In an embodiment, a memory interface may send an indication that a request is being sent. The indication may be sent to a non-volatile memory via a point-to-point bus between a memory interface and the non-volatile memory. The memory interface may send the request to the non-volatile memory via the bus. The request may include an address that may be used to identify a location for storing or reading data. The non-volatile memory may acquire the request from the bus and process the request. After processing the request, the non-volatile memory may send an indication to the memory interface that indicates the non-volatile memory has a response to send to the memory interface. The memory interface may grant access to the bus to the non-volatile memory. After being granted access to the bus, the non-volatile memory may send the response to the memory interface.

Abstract: An embodiment may include circuitry to (a) convert, at least in part, at least one serial storage protocol compatible frame into at least one packet that is compatible, at least in part, with a multi-lane input/output (I/O) protocol, and/or (b) convert, at least in part, the at least one packet into the at least one frame. The at least one packet may be transmitted via a physical layer that is compatible, at least in part, with the multi-lane I/O protocol. The at least one packet may comprise frame information structure (FIS) information of the at least one frame.

Abstract: An embodiment may include circuitry to (a) convert, at least in part, at least one serial storage protocol compatible frame into at least one packet that is compatible, at least in part, with a multi-lane input/output (I/O) protocol, and/or (b) convert, at least in part, the at least one packet into the at least one frame. The at least one packet may be transmitted via a physical layer that is compatible, at least in part, with the multi-lane I/O protocol. The at least one packet may comprise frame information structure (FIS) information of the at least one frame.

Abstract: Embodiments of the invention describe methods, apparatuses and systems for providing an efficient low power exit sequence for peripheral devices. In embodiments of the invention, a signal from a host device is transmitted to a SATA peripheral device for exiting a low-power state. An initialization time for OOB transmission and reception logic of the SATA peripheral device is tracked, and a reference time value based on the tracked initialization time is stored. In subsequent transitions from said low-power state, the reference time value for waking a host physical layer is utilized, thereby improving the efficiency of the management and use of said low power state. In some embodiments, the above described tracked initialization comprises a time from a transmission of an OOB signal (from the host to the peripheral device) to receiving an OOB response at the host device from the SATA peripheral device.

Abstract: A method, device, and system are disclosed. In one embodiment method begins by receiving a first new mass storage disk access request. The method then determines the total number of access requests to the mass storage disk received in a window of time. If the total number of requests received over the period of time is greater than or equal to a request threshold number then a request frequency counter is decremented. Otherwise, the counter is incremented. The method continues by generating a legacy advanced technology attachment (ATA)-type command for the first new access request when the counter is greater than or equal to a counter threshold number. Otherwise, the method generates a native command queue (NCQ)-type command for the first new access request.

Abstract: A host device and a storage device with a Serial ATA (SATA) architecture to independently transition to a deeper low power state after first entering an initial low power state without first transitioning to the Active state. The transition from the Partial state to the Slumber state is direct and the transition may be enabled, but not negotiated through a handshaking process.

Abstract: A method, device, and system are disclosed. In one embodiment method begins by receiving a first new mass storage disk access request. The method then determines the total number of access requests to the mass storage disk received in a window of time. If the total number of requests received over the period of time is greater than or equal to a request threshold number then a request frequency counter is decremented. Otherwise, the counter is incremented. The method continues by generating a legacy advanced technology attachment (ATA)-type command for the first new access request when the counter is greater than or equal to a counter threshold number. Otherwise, the method generates a native command queue (NCQ)-type command for the first new access request.

Abstract: In an embodiment, an apparatus is provided that may include circuitry to, in response at least in part to detected change in at least one of acceleration and orientation of storage, request suspension of at least one command currently stored in at least one pending command queue that is intended for execution, at least in part, by the storage. The at least one command having been previously issued by the circuitry but being currently unexecuted, at least in part, by the storage. The circuitry also being to store, in response at least in part to the detected change, at least one copy of the at least one command for later re-issuance by the circuitry, and to request replacement of at least one command in the at least one queue with at least one other command to park at least one head of the storage.

Abstract: A method, apparatus, system, and computer program product for enabling out-of-band access to storage devices through port-sharing hardware. Providing out-of-band access to storage devices enables system management functions to be performed when an operating system is non-functional as well as when the operating system is active. Storage commands originating with a management service can be interleaved with storage commands issued by the host operating system. The host operating system maintains ownership and control over its storage devices, but management activities can be performed while the host operating system is operational.

Abstract: A host device and a storage device with a Serial ATA (SATA) architecture to independently transition to a deeper low power state after first entering an initial low power state without first transitioning to the Active state. The transition from the Partial state to the Slumber state is direct and the transition may be enabled, but not negotiated through a handshaking process.

Abstract: In an embodiment, an apparatus is provided that may include circuitry to, in response at least in part to detected change in at least one of acceleration and orientation of storage, request suspension of at least one command currently stored in at least one pending command queue that is intended for execution, at least in part, by the storage. The at least one command having been previously issued by the circuitry but being currently unexecuted, at least in part, by the storage. The circuitry also being to store, in response at least in part to the detected change, at least one copy of the at least one command for later re-issuance by the circuitry, and to request replacement of at least one command in the at least one queue with at least one other command to park at least one head of the storage.

Abstract: A method, device, and system are disclosed. In one embodiment method begins by receiving a first new mass storage disk access request. The method then determines the total number of access requests to the mass storage disk received in a window of time. If the total number of requests received over the period of time is greater than or equal to a request threshold number then a request frequency counter is decremented. Otherwise, the counter is incremented. The method continues by generating a legacy advanced technology attachment (ATA)-type command for the first new access request when the counter is greater than or equal to a counter threshold number. Otherwise, the method generates a native command queue (NCQ)-type command for the first new access request.