Patents by Inventor Enis Dengi

Enis Dengi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7603642
    Abstract: The invention is a method of placement of components and networks (nets), utilized for interconnecting the components, of a circuit layout. The method includes forming for electrical devices, pads (or lands) and networks (nets) of a circuit layout a listing of the positions thereof with respect to one another, connections therebetween and the orientation of each net or subnet thereof in the circuit layout. The thus formed list is processed subject to at least one objective regarding the size of the circuit layout, whereupon a placement of the electrical devices and the pads is determined simultaneously with the placement of the networks.
    Type: Grant
    Filed: September 27, 2006
    Date of Patent: October 13, 2009
    Assignee: Cadence Design Systems, Inc.
    Inventors: Pero Subasic, Xuejin Wang, Enis A. Dengi, Ibraz H. Mohammed
  • Publication number: 20080120083
    Abstract: A system and method for modeling an IC (integrated circuit) employs a mesh model and a grid model for separating impedance effects between nearby and far-away pairs of mesh elements. Models for relating currents and voltages can be incrementally adapted from other designs or design elements in applications including mixed-signal, analog and RF (radio frequency) circuits.
    Type: Application
    Filed: November 17, 2006
    Publication date: May 22, 2008
    Applicant: Cadence Design Systems, Inc.
    Inventors: Enis A. Dengi, Feng Ling, Ben Song, Warren Harris
  • Publication number: 20080120084
    Abstract: A system and method for modeling an IC (integrated circuit) employs a mesh model and a grid model for separating impedance effects between nearby and far-away pairs of mesh elements. Models for relating currents and voltages can be incrementally adapted from other designs or design elements in applications including mixed-signal, analog and RF (radio frequency) circuits.
    Type: Application
    Filed: November 17, 2006
    Publication date: May 22, 2008
    Applicant: Cadence Design Systems, Inc.
    Inventors: Enis A. Dengi, Feng Ling, Ben Song, Warren Harris
  • Publication number: 20050076317
    Abstract: To estimate a distribution of voltages or currents in the layers of a multi-layer circuit, an exemplary current flow in each layer is discretized into a number of current vector elements and at least one scalar charge element related to the charge associated with each current vector element. A first distribution of voltages induced in each circuit layer is determined from current vector elements in all of the circuit layers. A second distribution of voltages induced in each circuit layer is determined from the scalar charge elements in all of the circuit layers. For each circuit layer, the first and second distributions of voltages induced therein are combined to determine an actual distribution of voltages in the circuit layer.
    Type: Application
    Filed: April 30, 2004
    Publication date: April 7, 2005
    Applicant: Cadence Design Systems, Inc.
    Inventors: Feng Ling, Vladimir Okhmatovski, Enis Dengi