Abstract: At a subscriber station AU communicating with a central office of a data network, a logic unit UM includes a processing subunit UE which, under the control of a microprogrammed subunit UC comprising a microinstruction memory MM and a sequencer SQ, digitally demodulates an incoming carrier and synthesizes an outgoing carrier modulated in the DPSK (differential-phase-shift keying) mode. The modulation is effected by multiplying stored bits of an outgoing signal, read out from a data memory MD, with bits representing digitized sine and cosine samples of the carrier wave obtained from a calculator AL within subunit UE, followed by conversion to analog form and filtering; demodulation is carried out in a similar manner, after conversion of analog samples of the incoming carrier to digital form, by multiplying the resulting bits with those of the calculated sine and cosine samples.

Abstract: A signal receiver of a QPSK data-transmission system comprises two noncoherent demodulators feeding digitized in-phase and quadrature components to a pair of transversal filters whose coefficients are read out, during successive keying intervals, from a read/write memory accessed by an arithmetic unit which generates corrective terms updating these coefficients. A comparator in the output of each filter detects estimated phase jumps between delayed and undelayed filtered samples of each signal component and delivers them to a decision circuit as well as to an error detector which also receives quantized output signals from the decision circuit to produce two error signals fed to the arithmetic unit; the latter further receives the delayed and undelayed filtered samples as well as ancillary data temporarily stored in these filters to calculate the corrective terms.