Patents by Inventor Enrico Maria Alfonso Ravanelli

Enrico Maria Alfonso Ravanelli has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6605873
    Abstract: The integrated electronic device comprises a protection structure of metal, extending vertically and laterally to and along a predominant part of the periphery of an electronic component integrated underneath the pad region. The protection structure comprises a substantially annular region formed from a second metal layer and absorbing the stresses exerted on the pad during wire bonding. The annular region may be floating or form part of the path connecting the pad to the electronic component.
    Type: Grant
    Filed: December 4, 1998
    Date of Patent: August 12, 2003
    Assignee: STMicroelectronics S.r.l.
    Inventors: Benedetto Vigna, Enrico Maria Alfonso Ravanelli
  • Patent number: 6489228
    Abstract: The integrated electronic device comprises a protection structure of metal, extending vertically and laterally to and along a predominant part of the periphery of an electronic component integrated underneath the pad region. The protection structure comprises a substantially annular region formed from a second metal layer and absorbing the stresses exerted on the pad during wire bonding. The annular region may be floating or form part of the path connecting the pad to the electronic component.
    Type: Grant
    Filed: October 2, 2000
    Date of Patent: December 3, 2002
    Assignee: STMicroelectronics S.r.l.
    Inventors: Benedetto Vigna, Enrico Maria Alfonso Ravanelli
  • Patent number: 5789785
    Abstract: A device for protecting an integrated circuit against electrostatic discharges, and adapted for connection between a terminal and a ground of the integrated circuit, which includes a first transistor (Q2) connected between that terminal and ground by its emitter terminal and collector terminal, respectively, and a second transistor (Q1) which has its base terminal connected to the base terminal of the first transistor. The emitter and collector terminals of the second transistor (Q2) are connected to the collector of the first transistor (Q1).
    Type: Grant
    Filed: February 28, 1996
    Date of Patent: August 4, 1998
    Assignee: SGS-Thomson Microelectronics S.r.l.
    Inventors: Enrico Maria Alfonso Ravanelli, Fabrizio Martignoni