Abstract: A transimpedance amplifier includes a T-coil in its feedback loop to expand its bandwidth. The transimpedance amplifier includes an amplifier that converts and amplifies an input current signal to an intermediary voltage signal. One terminal of the T-coil is coupled to a resistor in the feedback loop which is coupled to the input of the amplifier. Another terminal of the T-coil is coupled to the output of an amplifier. The bridge point of the T-coil is coupled to the output terminal of the transimpedance amplifier which outputs an output voltage. The T-coil includes two inductors that are mutually coupled such that a current is induced to compensate for the leakage current caused by the parasitic capacitance of the transimpedance amplifier.

Abstract: A transimpedance amplifier includes a T-coil in its feedback loop to expand its bandwidth. The transimpedance amplifier includes an amplifier that converts and amplifies an input current signal to an intermediary voltage signal. One terminal of the T-coil is coupled to a resistor in the feedback loop which is coupled to the input of the amplifier. Another terminal of the T-coil is coupled to the output of an amplifier. The bridge point of the T-coil is coupled to the output terminal of the transimpedance amplifier which outputs an output voltage. The T-coil includes two inductors that are mutually coupled such that a current is induced to compensate for the leakage current caused by the parasitic capacitance of the transimpedance amplifier.

Abstract: A receiver system that includes an ADC for converting analog values to digital representations. A digital representation is a sum of discrete values some of which are non-binary scaled and the other are binary scaled. The ADC includes dedicated comparators to determine whether to add or to subtract the non-binary scaled values. A comparator is used to determine whether to add or to subtract the binary scaled values. The ADC further calibrates offset voltages of the comparators to substantially remove dead zone and conversion errors, without compromising the conversion speed. The calibration can be performed both in foreground and background.

Abstract: A receiver system that includes an ADC for converting analog values to digital representations. A digital representation is a sum of discrete values some of which are non-binary scaled and the other are binary scaled. The ADC includes dedicated comparators to determine whether to add or to subtract the non-binary scaled values. A comparator is used to determine whether to add or to subtract the binary scaled values. The ADC further calibrates offset voltages of the comparators to substantially remove dead zone and conversion errors, without compromising the conversion speed. The calibration can be performed both in foreground and background.

Abstract: A frequency doubling device suitable to generate an output terminal voltage oscillating at a differential frequency double the frequency of the input differential voltage, includes a first differential pair of P-type transistors and a second differential pair of N-type transistors controlled by the differential input voltage, as well as an LC oscillator including a LC resonant dipole through which the absorbed current is forced by two differential pairs of transistors.

Abstract: A ring oscillator includes a first delay stage generating a first phase signal and a second delay stage generating a second phase signal. Each of the first and second delay stages includes variable resistance circuit. A phase comparator circuit performs a phase comparison between the first and second phase signals to generate a phase error signal. An amplifier circuit generates a control signal from the phase error signal. A feedback loop applies the control signal to control the resistance of the variable resistance circuits in the first and second delay stages.

Abstract: A frequency doubling device suitable to generate an output terminal voltage oscillating at a differential frequency double the frequency of the input differential voltage, includes a first differential pair of P-type transistors and a second differential pair of N-type transistors controlled by the differential input voltage, as well as an LC oscillator including a LC resonant dipole through which the absorbed current is forced by two differential pairs of transistors.