Patents by Inventor Enrico Stefano
Enrico Stefano has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11079232Abstract: A device includes an optical resonator having four ports including a first port, a second port, a third port, and a fourth port. A first electronic circuit is configured to calculate a first information representative of a power difference between optical signals supplied by two of the four ports. A method of operating a device is also disclosed.Type: GrantFiled: July 15, 2019Date of Patent: August 3, 2021Assignee: STMicroelectronics S.R.L.Inventors: Antonio Fincato, Enrico Stefano Temporiti Milani, Maurizio Zuffada, Angelica Simbula
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Publication number: 20200025569Abstract: A device includes an optical resonator having four ports including a first port, a second port, a third port, and a fourth port. A first electronic circuit is configured to calculate a first information representative of a power difference between optical signals supplied by two of the four ports. A method of operating a device is also disclosed.Type: ApplicationFiled: July 15, 2019Publication date: January 23, 2020Inventors: Antonio Fincato, Enrico Stefano Temporiti Milani, Maurizio Zuffada, Angelica Simbula
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Patent number: 9391708Abstract: An intra-board chip-to-chip optical communications system has a high bit rate and high data throughput based on the use of a silicon photonic interposer. The system includes a multi-substrate electro-optical structure for communications with CMOS and/or BiCMOS IC chips of a PCB. The structure includes a multi-chip module primary substrate mounted over the supporting PCB. The multi-chip module primary substrate implements high frequency electrical interconnections between transceiver circuit chips, mounted on the silicon photonic interposer, and the IC chips.Type: GrantFiled: May 18, 2015Date of Patent: July 12, 2016Assignee: STMICROELECTRONICS S.R.L.Inventors: Antonio Fincato, Salvatore Mario Rotolo, Enrico Stefano Temporiti Milani, Maurizio Zuffada
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Patent number: 9229250Abstract: A relatively high-speed, high-efficiency CMOS two branch driver core that may operate under relatively low supply voltage may include thin oxide CMOS transistors configured to generate rail-to-rail output swings larger than twice a supply voltage and without exceeding safe operating area limits. Each of the two branches may include two stacked CMOS inverter pairs configured to drive a respective load capacitance coupled between respective CMOS inverter outputs, in phase opposition to the other branch. A pre-driver circuit input with a differential modulating signal may output two synchronous differential voltage drive signals of a swing of half of the supply voltage and DC-shifted by half of the supply voltage with respect to each other and that may be applied to the respective CMOS inverter inputs of the two branches.Type: GrantFiled: October 1, 2013Date of Patent: January 5, 2016Assignee: STMICROELECTRONICS S.R.L.Inventors: Gabriele Minoia, Salvatore Galeone, Enrico Stefano Temporiti Milani
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Publication number: 20150341119Abstract: An intra-board chip-to-chip optical communications system has a high bit rate and high data throughput based on the use of a silicon photonic interposer. The system includes a multi-substrate electro-optical structure for communications with CMOS and/or BiCMOS IC chips of a PCB. The structure includes a multi-chip module primary substrate mounted over the supporting PCB. The multi-chip module primary substrate implements high frequency electrical interconnections between transceiver circuit chips, mounted on the silicon photonic interposer, and the IC chips.Type: ApplicationFiled: May 18, 2015Publication date: November 26, 2015Inventors: Antonio FINCATO, Salvatore Mario Rotolo, Enrico Stefano Temporiti Milani, Maurizio Zuffada
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Patent number: 9018984Abstract: An electrical-optical modulator may function at high data rates and may be realized in comparably low cost silicon base technology, typically in BJT, BiCMOS or CMOS technologies. The output signal path may include a high transition frequency BJT and by using an active load constituted by a MOS driven by an inverted version of the modulating signal that drives the BJT, the falling edge of the output signal is sped up.Type: GrantFiled: January 22, 2014Date of Patent: April 28, 2015Assignee: STMicroelectronics S.r.l.Inventors: Maurizio Zuffada, Enrico Stefano Temporiti Milani, Antonio Fincato
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Patent number: 8989601Abstract: A modular hub driver architecture may include a multi-delay block configured to provide an enhanced delay match among N distinct stages of a distributed modulating electro-optical interface core. The electro-optical multi-core modulator driver may include an input impedance matching stage and a pre-conditioning circuit configured to generate a number M, an integer divisor of N, of delayed replicas of an electrical modulating signal. The electro-optical multi-core modulator may include an array of M launch buffers of the replica signals, and an array of M multi-delay blocks, each including delay circuit modules differently cascaded on distinct signal paths, and configured to receive, at respective inputs, the M replica signals and to output N/M differently delayed replicas of the input signals, each driving a correspondent output stage of one on the N electro-optical interface cores.Type: GrantFiled: October 1, 2013Date of Patent: March 24, 2015Assignee: STMicroelectronics S.R.L.Inventors: Enrico Stefano Temporiti Milani, Matteo Repossi, Daniele Baldi
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Patent number: 8981853Abstract: A differential or pseudo-differential TIA includes an auxiliary differential amplifier input transistor pair cross-coupled to the output nodes to cancel undesired output signal components. The advantages of a classical differential topology are retained while performance at a high data rate is significantly improved.Type: GrantFiled: April 23, 2013Date of Patent: March 17, 2015Assignee: STMicroelectronics S.R.L.Inventors: Wissam Yussef Sabri Eyssa, Enrico Stefano Temporiti Milani, Daniele Baldi
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Patent number: 8907729Abstract: The differential trans-impedance amplifier uses trans-resistance(s) connected between the input nodes of a first differential amplifier, to implement a trans-impedance differential amplifier in a differential fashion and has two identical resistances, each connected between the photodiode and a respective DC voltage rail of a common bias network of the photodiode adapted to reverse bias the photodiode. The biasing resistances may be much larger than the trans-resistance(s) to prevent drawing any significant signal current from the photodiode. The amplifier may retain the advantages of a classical differential topology while effectively overcoming drawbacks that arise in high data rate applications.Type: GrantFiled: April 17, 2013Date of Patent: December 9, 2014Assignee: STMicroelectronics S.R.L.Inventors: Enrico Stefano Temporiti Milani, Wissam Yussef Sabri Eyssa, Gabriele Minoia
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Publication number: 20140218073Abstract: An electrical-optical modulator may function at high data rates and may be realized in comparably low cost silicon base technology, typically in BJT, BiCMOS or CMOS technologies. The output signal path may include a high transition frequency BJT and by using an active load constituted by a MOS driven by an inverted version of the modulating signal that drives the BJT, the falling edge of the output signal is sped up.Type: ApplicationFiled: January 22, 2014Publication date: August 7, 2014Applicant: STMICROELECTRONICS S.r.I.Inventors: Maurizio ZUFFADA, Enrico Stefano TEMPORITI MILANI, Antonio FINCATO
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Publication number: 20140105605Abstract: A modular hub driver architecture may include a multi-delay block configured to provide an enhanced delay match among N distinct stages of a distributed modulating electro-optical interface core. The electro-optical multi-core modulator driver may include an input impedance matching stage and a pre-conditioning circuit configured to generate a number M, an integer divisor of N, of delayed replicas of an electrical modulating signal. The electro-optical multi-core modulator may include an array of M launch buffers of the replica signals, and an array of M multi-delay blocks, each including delay circuit modules differently cascaded on distinct signal paths, and configured to receive, at respective inputs, the M replica signals and to output N/M differently delayed replicas of the input signals, each driving a correspondent output stage of one on the N electro-optical interface cores.Type: ApplicationFiled: October 1, 2013Publication date: April 17, 2014Applicant: STMicroelectronics S.R.L.Inventors: Enrico Stefano TEMPORITI MILANI, Matteo Repossi, Daniele Baldi
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Publication number: 20140104666Abstract: A relatively high-speed, high-efficiency CMOS two branch driver core that may operate under relatively low supply voltage may include thin oxide CMOS transistors configured to generate rail-to-rail output swings larger than twice a supply voltage and without exceeding safe operating area limits. Each of the two branches may include two stacked CMOS inverter pairs configured to drive a respective load capacitance coupled between respective CMOS inverter outputs, in phase opposition to the other branch. A pre-driver circuit input with a differential modulating signal may output two synchronous differential voltage drive signals of a swing of half of the supply voltage and DC-shifted by half of the supply voltage with respect to each other and that may be applied to the respective CMOS inverter inputs of the two branches.Type: ApplicationFiled: October 1, 2013Publication date: April 17, 2014Applicant: STMICROELECTRONICS S.R.L.Inventors: Gabriele MINOIA, Salvatore Galeone, Enrico Stefano Temporiti Milani
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Publication number: 20130293301Abstract: A differential or pseudo-differential TIA includes an auxiliary differential amplifier input transistor pair cross-coupled to the output nodes to cancel undesired output signal components. The advantages of a classical differential topology are retained while performance at a high data rate is significantly improved.Type: ApplicationFiled: April 23, 2013Publication date: November 7, 2013Applicant: STMICROELECTRONICS S.R.L.Inventors: Wissam Yussef Sabri EYSSA, Enrico Stefano TEMPORITI MILANI, Daniele BALDI
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Publication number: 20130278338Abstract: The differential trans-impedance amplifier uses trans-resistance(s) connected between the input nodes of a first differential amplifier, to implement a trans-impedance differential amplifier in a differential fashion and has two identical resistances, each connected between the photodiode and a respective DC voltage rail of a common bias network of the photodiode adapted to reverse bias the photodiode. The biasing resistances may be much larger than the trans-resistance(s) to prevent drawing any significant signal current from the photodiode. The amplifier may retain the advantages of a classical differential topology while effectively overcoming drawbacks that arise in high data rate applications.Type: ApplicationFiled: April 17, 2013Publication date: October 24, 2013Applicant: STMICROELECTRONICS S.R.L.Inventors: Enrico Stefano TEMPORITI MILANI, Wissam Yussef Sabri EYSSA, Gabriele MINOIA
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Patent number: 7940099Abstract: An all-digital phase locked loop (ADPLL) generates a feedback word representing a continuous-time oscillating signal. The ADPLL includes a time-to-digital converter (TDC) configured to be input with the continuous-time oscillating signal and a reference signal. The reference signal is a function of a reference clock signal. The TDC is configured to generate a digital word, the feedback word being a function of the digital word. The ADPLL includes a delay circuit configured to be input with at least one of the reference clock signal and the continuous-time oscillating signal and to be controlled by a first dither signal.Type: GrantFiled: December 3, 2009Date of Patent: May 10, 2011Assignee: STMicroelectronics S.R.L.Inventors: Colin Weltin-Wu, Enrico Stefano Temporiti Milani, Daniele Baldi
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Publication number: 20100141316Abstract: An all-digital phase locked loop (ADPLL) generates a feedback word representing a continuous-time oscillating signal. The ADPLL includes a time-to-digital converter (TDC) configured to be input with the continuous-time oscillating signal and a reference signal. The reference signal is a function of a reference clock signal. The TDC is configured to generate a digital word, the feedback word being a function of the digital word. The ADPLL includes a delay circuit configured to be input with at least one of the reference clock signal and the continuous-time oscillating signal and to be controlled by a first dither signal.Type: ApplicationFiled: December 3, 2009Publication date: June 10, 2010Applicant: STMicroelectronics S.r.I.Inventors: Colin WELTIN-WU, Enrico Stefano Temporiti Milani, Daniele Baldi
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Publication number: 20060065469Abstract: A feedback assembly (1) for an electronically controlled electro-mechanical actuating unit (2) for a motor vehicle, the feedback assembly (1) having a connection to the actuating unit (2), a shaft (10), which is angularly fixed to a steering member of the motor vehicle, and an electrical actuator (20), which is angularly coupled to the shaft (10) for exerting a resistant torque on the shaft (10) itself according to the conditions of movement of the motor vehicle; a mechanical transmission (21) with concurrent axes (A, B) being set between the electrical actuator (20) and the shaft (10).Type: ApplicationFiled: October 6, 2003Publication date: March 30, 2006Applicant: Aktiebolaget skfInventors: Enrico Stefano, Mario Rossi