Abstract: A differential analog filter includes a differential input that includes a first input node and a second input node and a differential output that includes a first output node and a second output node. A fully differential amplifier includes a non-inverting input node and an inverting input node coupled to the differential input. The fully differential amplifier includes a non-inverting output node and an inverting output node coupled to the differential output. A first feedback network is coupled between the non-inverting output node and the inverting input node of the fully differential amplifier. A second feedback network is coupled between the inverting output node and the non-inverting input node of the fully differential amplifier.

Abstract: An apparatus and method for biasing at least one transistor of a Radio Frequency Digital to Analog Converter (RFDAC). The apparatus including a direct base current injection circuit for injecting a DC current waveform directly into a base terminal of the transistor.

Abstract: A phase locked loop includes a buffer that synchronizes the transmission of the new count value to the completion of the previous count to avoid errors caused by dithering. The buffer is connected to a count input of the counter and transmits the new count upon receipt of the carryout signal from the counter. Alternatively, the transmission of the new value of N from the buffer is delayed after receipt by the buffer of a carryout signal from the counter. In another embodiment, a delayed version of the carryout signal is used to trigger the buffer to transmit the new count value to the counter. In another feature, a buffer synchronizes phase data to a reference signal before inputting it to a digital modulator of the phase locked loop.