Patents by Inventor Eou-sik Cho

Eou-sik Cho has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7351618
    Abstract: A method of manufacturing a thin film transistor (TFT) substrate to minimize a rugged surface of an organic layer overlapping with a storage electrode is provided. The method includes forming a passivation layer on a substrate having a storage electrode and an organic layer covering the passivation layer, forming a concave portion by partially removing a portion of the organic layer that overlaps with the storage electrode, planarizing a rugged pattern located on the bottom of the concave portion, and forming an opening extending to a surface of the passivation layer by removing the planarized organic layer from the concave portion.
    Type: Grant
    Filed: May 31, 2006
    Date of Patent: April 1, 2008
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Eou-sik Cho, Jang-soo Kim
  • Publication number: 20070020825
    Abstract: A method of manufacturing a thin film transistor (TFT) substrate to minimize a rugged surface of an organic layer overlapping with a storage electrode is provided. The method includes forming a passivation layer on a substrate having a storage electrode and an organic layer covering the passivation layer, forming a concave portion by partially removing a portion of the organic layer that overlaps with the storage electrode, planarizing a rugged pattern located on the bottom of the concave portion, and forming an opening extending to a surface of the passivation layer by removing the planarized organic layer from the concave portion.
    Type: Application
    Filed: May 31, 2006
    Publication date: January 25, 2007
    Inventors: Eou-sik Cho, Jang-soo Kim
  • Publication number: 20060243975
    Abstract: A thin film transistor substrate comprises an insulating substrate, a gate member formed on the insulating substrate, the gate member having a gate line and a first storage electrode spaced apart from the gate line, a gate insulating layer covering the gate member, an active layer formed on the gate insulating layer and overlapping the first storage electrode, and a data member formed on the active layer, the data member having a data line crossing the gate line and a second storage electrode overlapping the first storage electrode.
    Type: Application
    Filed: February 24, 2006
    Publication date: November 2, 2006
    Inventors: Jang-Soo Kim, Sang-Woo Whangbo, Eou-Sik Cho, Shi-Yul Kim, Hwa-Yeul Oh, Chong-Chul Chai