Patents by Inventor Er-Xang Ping

Er-Xang Ping has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6337243
    Abstract: A semiconductor processing method of providing a hemispherical grain polysilicon layer atop a substrate includes, a) providing a substantially amorphous layer of silicon over a substrate at a selected temperature; b) raising the temperature of the substantially amorphous silicon layer to a higher dielectric layer deposition temperature, the temperature raising being effective to transform the amorphous silicon layer into hemispherical grain polysilicon; and c) depositing a dielectric layer over the silicon layer at the higher dielectric deposition temperature. Transformation to hemispherical grain might occur during the temperature rise to the higher dielectric layer deposition temperature, after the higher dielectric layer deposition temperature has been achieved but before dielectric layer deposition, or after the higher dielectric layer deposition temperature has been achieved and during dielectric layer deposition.
    Type: Grant
    Filed: January 25, 2001
    Date of Patent: January 8, 2002
    Assignee: Micron Technology, Inc.
    Inventors: Er-Xang Ping, Randhir P. S. Thakur
  • Publication number: 20010009808
    Abstract: A semiconductor processing method of providing a hemispherical grain polysilicon layer atop a substrate includes, a) providing a substantially amorphous layer of silicon over a substrate at a selected temperature; b) raising the temperature of the substantially amorphous silicon layer to a higher dielectric layer deposition temperature, the temperature raising being effective to transform the amorphous silicon layer into hemispherical grain polysilicon; and c) depositing a dielectric layer over the silicon layer at the higher dielectric deposition temperature. Transformation to hemispherical grain might occur during the temperature rise to the higher dielectric layer deposition temperature, after the higher dielectric layer deposition temperature has been achieved but before dielectric layer deposition, or after the higher dielectric layer deposition temperature has been achieved and during dielectric layer deposition.
    Type: Application
    Filed: January 25, 2001
    Publication date: July 26, 2001
    Inventors: Er-Xang Ping, Randhir P.S. Thakur
  • Patent number: 6194264
    Abstract: A semiconductor processing method of providing a hemispherical grain polysilicon layer atop a substrate includes, a) providing a substantially amorphous layer of silicon over a substrate at a selected temperature; b) raising the temperature of the substantially amorphous silicon layer to a higher dielectric layer deposition temperature, the temperature raising being effective to transform the amorphous silicon layer into hemispherical grain polysilicon; and c) depositing a dielectric layer over the silicon layer at the higher dielectric deposition temperature. Transformation to hemispherical grain might occur during the temperature rise to the higher dielectric layer deposition temperature, after the higher dielectric layer deposition temperature has been achieved but before dielectric layer deposition, or after the higher dielectric layer deposition temperature has been achieved and during dielectric layer deposition.
    Type: Grant
    Filed: August 20, 1997
    Date of Patent: February 27, 2001
    Assignee: Micron Technology, Inc.
    Inventors: Er-Xang Ping, Randhir P. S. Thakur
  • Patent number: 6159828
    Abstract: A semiconductor processing method of providing a doped polysilicon layer atop a substrate includes, a) depositing a layer of substantially amorphous silicon having a dopant concentration of less than or equal to about 1.times.10.sup.16 atoms/cm.sup.3 over a substrate to a thickness of less than or equal to about 30 Angstroms; b) depositing a layer of silicon over the amorphous silicon layer in a manner which in situ dopes such layer to a dopant concentration of greater than about 1.times.10.sup.16 atoms/cm.sup.3 ; and c) providing the deposited silicon layers to be polycrystalline. Preferably, the substantially amorphous layer is entirely undoped as-deposited. The invention is believed to have greatest applicability to provision of thin film doped polysilicon layers having thicknesses of less than or equal to about 100 Angstroms. Accordingly, the combined thickness of the deposited silicon layers is preferably less than or equal to about 100 Angstroms.
    Type: Grant
    Filed: December 8, 1998
    Date of Patent: December 12, 2000
    Assignee: Micron Technology, Inc.
    Inventors: Er-Xang Ping, Randhir P. S. Thakur
  • Patent number: 5869389
    Abstract: A semiconductor processing method of providing a doped polysilicon layer atop a substrate includes, a) depositing a layer of substantially amorphous silicon having a dopant concentration of less than or equal to about 1.times.10.sup.16 atoms/cm.sup.3 over a substrate to a thickness of less than or equal to about 30 Angstroms; b) depositing a layer of silicon over the amorphous silicon layer in a manner which in situ dopes such layer to a dopant concentration of greater than about 1.times.10.sup.16 atoms/cm.sup.3 ; and c) providing the deposited silicon layers to be polycrystalline. Preferably, the substantially amorphous layer is entirely undoped as-deposited. The invention is believed to have greatest applicability to provision of thin film doped polysilicon layers having thicknesses of less than or equal to about 100 Angstroms. Accordingly, the combined thickness of the deposited silicon layers is preferably less than or equal to about 100 Angstroms.
    Type: Grant
    Filed: January 18, 1996
    Date of Patent: February 9, 1999
    Assignee: Micron Technology, Inc.
    Inventors: Er-Xang Ping, Randhir P. S. Thakur
  • Patent number: 5691228
    Abstract: A semiconductor processing method of providing a hemispherical grain polysilicon layer atop a substrate includes, a) providing a substantially amorphous layer of silicon over a substrate at a selected temperature; b) raising the temperature of the substantially amorphous silicon layer to a higher dielectric layer deposition temperature, the temperature raising being effective to transform the amorphous silicon layer into hemispherical grain polysilicon; and c) depositing a dielectric layer over the silicon layer at the higher dielectric deposition temperature. Transformation to hemispherical grain might occur during the temperature rise to the higher dielectric layer deposition temperature, after the higher dielectric layer deposition temperature has been achieved but before dielectric layer deposition, or after the higher dielectric layer deposition temperature has been achieved and during dielectric layer deposition.
    Type: Grant
    Filed: January 18, 1996
    Date of Patent: November 25, 1997
    Assignee: Micron Technology, Inc.
    Inventors: Er-Xang Ping, Randhir P. S. Thakur