Patents by Inventor Eran Galil
Eran Galil has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20230334148Abstract: A processing unit, where the processing unit one of a group of processing units of a system, includes a processor; and memory including instructions, which when executed by the processor while avoiding interrupting a controller that does not belong to the group of processing units, cause the processor to: perform at least one iteration of the steps of: (a) entering a trusted mode, (b) selecting a selected job to be executed by the processing unit, (c) retrieving access control metadata related to the selected job, (d) entering, by the processing unit, an untrusted mode, (e) executing the selected job by the processing unit while adhering to the access control metadata related to the job, and (f) resetting the processing unit.Type: ApplicationFiled: June 16, 2023Publication date: October 19, 2023Inventors: Oren Agam, Liron KUCH, Eran GALIL, Liron ATEDGI
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Patent number: 11714897Abstract: A processing unit, where the processing unit one of a group of processing units of a system, includes a processor; and memory including instructions, which when executed by the processor while avoiding interrupting a controller that does not belong to the group of processing units, cause the processor to: perform at least one iteration of the steps of: (a) entering a trusted mode, (b) selecting a selected job to be executed by the processing unit, (c) retrieving access control metadata related to the selected job, (d) entering, by the processing unit, an untrusted mode, (e) executing the selected job by the processing unit while adhering to the access control metadata related to the job, and (f) resetting the processing unit.Type: GrantFiled: August 19, 2021Date of Patent: August 1, 2023Assignee: Mobileye Vision Technologies Ltd.Inventors: Oren Agam, Liron Kuch, Eran Galil, Liron Atedgi
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Publication number: 20230195506Abstract: A method for executing atomic commands may include receiving, by an interface of an atomic command execution unit and from a plurality of requestors, a plurality of memory mapped atomic commands. The method may also include executing the plurality of memory mapped atomic commands to provide output values. The method may further include storing, in a first memory unit of the atomic command execution unit, requestor specific information. Different entries of a plurality of entries of the first memory unit may be allocated to different requestors of the plurality of requestors. The method may also include storing, in a second memory unit of the atomic command execution unit, the output values of the plurality of memory mapped atomic commands, and outputting, by the interface and to at least one of the plurality of requestors, at least one indication indicating a completion of at least one of the atomic commands.Type: ApplicationFiled: February 16, 2023Publication date: June 22, 2023Inventors: Oren Agam, Liron Atedgi, Eran Galil, Liron Kuch
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Publication number: 20230116945Abstract: A method for executing an atomic compare and exchange operation, the method may include processing a compare command and a conditional exchange command while considering hardware failures.Type: ApplicationFiled: April 1, 2021Publication date: April 20, 2023Inventors: Eran GALIL, Boaz Ouriel
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Patent number: 11630774Abstract: Techniques are disclosed for preventing overwriting of shared line segments. The techniques include sending a data unit from a first processor to second processor using an augmented hardware cache coherency protocol, the augmented hardware cache coherency protocol being augmented to maintain dirty bits information during an exchange of the data unit within a cache coherency domain. A size of the data unit is a fraction of a size of any shared line of a shared memory, and writing the data unit to a segment of a shared line of a shared memory includes using another protocol, without overwriting another segment of the shared line. The writing is based at least in part on the dirty bits information, and the other protocol does not support hardware coherency and maintains the dirty bits information.Type: GrantFiled: September 24, 2021Date of Patent: April 18, 2023Assignee: Mobileye Vision Technologies Ltd.Inventors: Eran Galil, Yosef Kreinin
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Publication number: 20220194366Abstract: Disclosed embodiments provide systems and methods that can be used as part of or in combination with autonomous navigation, autonomous driving, or driver assist technology features. As opposed to fully autonomous driving, driver assist technology may refer to any suitable technology to assist drivers in the navigation or control of their vehicles. In various embodiments, the system may include one or more cameras mountable in a vehicle and an associated processor that monitors the environment of the vehicle. In further embodiments, additional types of sensors can be mounted in the vehicle and can be used in the autonomous navigation or driver assist systems. These systems and methods may include the use of a shared cache that is shared by a group of processing units to improve analysis of images captured by the one or more cameras.Type: ApplicationFiled: December 20, 2021Publication date: June 23, 2022Inventors: Eran BEN-AVI, Eran GALIL
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Publication number: 20220100659Abstract: Techniques are disclosed for preventing overwriting of shared line segments. The techniques include sending a data unit from a first processor to second processor using an augmented hardware cache coherency protocol, the augmented hardware cache coherency protocol being augmented to maintain dirty bits information during an exchange of the data unit within a cache coherency domain. A size of the data unit is a fraction of a size of any shared line of a shared memory, and writing the data unit to a segment of a shared line of a shared memory includes using another protocol, without overwriting another segment of the shared line. The writing is based at least in part on the dirty bits information, and the other protocol does not support hardware coherency and maintains the dirty bits information.Type: ApplicationFiled: September 24, 2021Publication date: March 31, 2022Inventors: Eran Galil, Yosef Kreinin
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Publication number: 20220067148Abstract: A processing unit, where the processing unit one of a group of processing units of a system, includes a processor; and memory including instructions, which when executed by the processor while avoiding interrupting a controller that does not belong to the group of processing units, cause the processor to: perform at least one iteration of the steps of: (a) entering a trusted mode, (b) selecting a selected job to be executed by the processing unit, (c) retrieving access control metadata related to the selected job, (d) entering, by the processing unit, an untrusted mode, (e) executing the selected job by the processing unit while adhering to the access control metadata related to the job, and (f) resetting the processing unit.Type: ApplicationFiled: August 19, 2021Publication date: March 3, 2022Inventors: Oren AGAM, Liron KUCH, Eran GALIL, Liron ATEDGI
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Patent number: 9697159Abstract: Described are embodiments of methods, apparatuses, and systems for time synchronization of a multi-protocol I/O interconnect of computer apparatus. A method for synchronizing time across the multi-protocol I/O interconnect may include determining a first local time at a first port of a first switch of a switching fabric of a multi-protocol interconnect and a second local time at a second port of a second switch of the switching fabric, calculating an offset value based at least in part on a difference between the first local time and the second local time, and adjusting the second local time by the offset value. Other embodiments may be described and claimed.Type: GrantFiled: December 27, 2011Date of Patent: July 4, 2017Assignee: Intel CorporationInventors: Prashant R. Chandra, Vladimir Yudovich, Eran Galil, Efraim Kugman
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Patent number: 9430435Abstract: Described are embodiments of methods, apparatuses, and systems for multi-protocol tunneling across a multi-protocol I/O interconnect of computer apparatus. A method for multi-protocol tunneling may include establishing a first communication path between ports of a switching fabric of a multi-protocol interconnect of a computer apparatus in response to a peripheral device being connected to the computer apparatus, establishing a second communication path between the switching fabric and a protocol-specific controller, and routing, by the multi-protocol interconnect, packets of a protocol of the peripheral device from the peripheral device to the protocol-specific controller over the first and second communication paths. Other embodiments may be described and claimed.Type: GrantFiled: May 20, 2014Date of Patent: August 30, 2016Assignee: INTEL CORPORATIONInventors: Prashant R. Chandra, Kevin C. Kahn, Eran Galil, Efraim Kugman, Naama Zolotov, Vladimir Yudovich, Yoni Dishon, Elli Bagelman
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Publication number: 20160226624Abstract: Disclosed herein are techniques to generate frames and pack frames for a line code, where the frames include a header information element, an error-correction information element, and a data information element. Additionally, disclosed are techniques to communicate via a high-speed interconnect using the above frames. A technique including a training state and an error-correction state are disclosed to synchronize communications via a serial interconnect and to communicate via the serial interconnect providing error-correction.Type: ApplicationFiled: March 23, 2015Publication date: August 4, 2016Inventors: EHUD SHOOR, ERAN GALIL, EFRAIM KUGMAN
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Patent number: 9164535Abstract: Described are embodiments of methods, apparatuses, and systems for time synchronization of a multi-protocol I/O interconnect of computer apparatus. A method for synchronizing time across the multi-protocol I/O interconnect may include providing a first local time of a first switch of a switching fabric of a multi-protocol interconnect to a second switch of the switching fabric, and adjusting a second local time of the second switch to the first local time. Other embodiments may be described and claimed.Type: GrantFiled: December 30, 2014Date of Patent: October 20, 2015Assignee: INTEL CORPORATIONInventors: Prashant R. Chandra, Vladimir Yudovich, Eran Galil, Efraim Kugman
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Patent number: 9141132Abstract: Described are embodiments of methods, apparatuses, and systems for time synchronization of a multi-protocol I/O interconnect of computer apparatus. A method for synchronizing time across the multi-protocol I/O interconnect may include providing a first local time of a first switch of a switching fabric of a multi-protocol interconnect to a second switch of the switching fabric, and adjusting a second local time of the second switch to the first local time. Other embodiments may be described and claimed.Type: GrantFiled: December 30, 2014Date of Patent: September 22, 2015Assignee: INTEL CORPORATIONInventors: Prashant R. Chandra, Vladimir Yudovich, Eran Galil, Efraim Kugman
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Publication number: 20150121115Abstract: Described are embodiments of methods, apparatuses, and systems for time synchronization of a multi-protocol I/O interconnect of computer apparatus. A method for synchronizing time across the multi-protocol I/O interconnect may include providing a first local time of a first switch of a switching fabric of a multi-protocol interconnect to a second switch of the switching fabric, and adjusting a second local time of the second switch to the first local time. Other embodiments may be described and claimed.Type: ApplicationFiled: December 30, 2014Publication date: April 30, 2015Inventors: Prashant R. Chandra, Vladimir Yudovich, Eran Galil, Efraim Kugman
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Publication number: 20150113186Abstract: Described are embodiments of methods, apparatuses, and systems for time synchronization of a multi-protocol I/O interconnect of computer apparatus. A method for synchronizing time across the multi-protocol I/O interconnect may include providing a first local time of a first switch of a switching fabric of a multi-protocol interconnect to a second switch of the switching fabric, and adjusting a second local time of the second switch to the first local time. Other embodiments may be described and claimed.Type: ApplicationFiled: December 30, 2014Publication date: April 23, 2015Inventors: Prashant R. Chandra, Vladimir Yudovich, Eran Galil, Efraim Kugman
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Patent number: 8953644Abstract: Described are embodiments of methods, apparatuses, and systems for time synchronization of a multi-protocol I/O interconnect of computer apparatus. A method for synchronizing time across the multi-protocol I/O interconnect may include providing a first local time of a first switch of a switching fabric of a multi-protocol interconnect to a second switch of the switching fabric, and adjusting a second local time of the second switch to the first local time. Other embodiments may be described and claimed.Type: GrantFiled: December 27, 2011Date of Patent: February 10, 2015Assignee: Intel CorporationInventors: Prashant R. Chandra, Vladimir Yudovich, Eran Galil, Efraim Kugman
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Publication number: 20140372661Abstract: Described are embodiments of methods, apparatuses, and systems for multi-protocol tunneling across a multi-protocol I/O interconnect of computer apparatus. A method for multi-protocol tunneling may include establishing a first communication path between ports of a switching fabric of a multi-protocol interconnect of a computer apparatus in response to a peripheral device being connected to the computer apparatus, establishing a second communication path between the switching fabric and a protocol-specific controller, and routing, by the multi-protocol interconnect, packets of a protocol of the peripheral device from the peripheral device to the protocol-specific controller over the first and second communication paths. Other embodiments may be described and claimed.Type: ApplicationFiled: May 20, 2014Publication date: December 18, 2014Inventors: Prashant R. Chandra, Kevin C. Kahn, Eran Galil, Efraim Kugman, Naama Zolotov, Vladimir Yudovich, Yoni Dishon, Elli Bagelman
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Patent number: 8775713Abstract: Described are embodiments of methods, apparatuses, and systems for multi-protocol tunneling across a multi-protocol I/O interconnect of computer apparatus. A method for multi-protocol tunneling may include establishing a first communication path between ports of a switching fabric of a multi-protocol interconnect of a computer apparatus in response to a peripheral device being connected to the computer apparatus, establishing a second communication path between the switching fabric and a protocol-specific controller, and routing, by the multi-protocol interconnect, packets of a protocol of the peripheral device from the peripheral device to the protocol-specific controller over the first and second communication paths. Other embodiments may be described and claimed.Type: GrantFiled: December 27, 2011Date of Patent: July 8, 2014Assignee: Intel CorporationInventors: Prashant R. Chandra, Kevin C. Kahn, Eran Galil, Efraim Kugman, Naama Zolotov, Vladimir Yudovich, Yoni Dishon, Elli Bagelman
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Publication number: 20140122755Abstract: Described are embodiments of methods, apparatuses, and systems for time synchronization of a multi-protocol I/O interconnect of computer apparatus. A method for synchronizing time across the multi-protocol I/O interconnect may include determining a first local time at a first port of a first switch of a switching fabric of a multi-protocol interconnect and a second local time at a second port of a second switch of the switching fabric, calculating an offset value based at least in part on a difference between the first local time and the second local time, and adjusting the second local time by the offset value. Other embodiments may be described and claimed.Type: ApplicationFiled: December 27, 2011Publication date: May 1, 2014Inventors: Prashant R. Chandra, Vladimir Yudovich, Eran Galil, Efraim Kugman
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Publication number: 20130163617Abstract: Described are embodiments of methods, apparatuses, and systems for time synchronization of a multi-protocol I/O interconnect of computer apparatus. A method for synchronizing time across the multi-protocol I/O interconnect may include providing a first local time of a first switch of a switching fabric of a multi-protocol interconnect to a second switch of the switching fabric, and adjusting a second local time of the second switch to the first local time. Other embodiments may be described and claimed.Type: ApplicationFiled: December 27, 2011Publication date: June 27, 2013Inventors: Prashant R. Chandra, Vladimir Yudovich, Eran Galil, Efraim Kugman