Patents by Inventor Eran Peleg

Eran Peleg has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • System for determining endothelial dependent vasoactivity
    Patent number: 8187196
    Abstract: A method of determining endothelial dependent vasoactivity of a subject, the method is effected by recording pressure-related signals of a plurality of locations adjacent to at least one blood vessel; extracting at least one parameter from the pressure-related signals; and using the at least one parameter to determine a change of at least one characteristic of the at least one blood vessel, the change being representative of endothelial functioning; thereby determining the endothelial dependent vasoactivity of the subject.
    Type: Grant
    Filed: April 25, 2008
    Date of Patent: May 29, 2012
    Assignee: Ramot at Tel-Aviv University Ltd.
    Inventors: Giora Amitzur, Shmuel Einav, Eran Peleg, Elya Zimerman
  • Device, system and method for accelerated modeling
    Patent number: 7823120
    Abstract: Briefly, embodiments of the invention provide, for example, devices, systems and methods for accelerated modeling. A method may include, for example, defining a domain-specific language (100) usable in a modeling environment (700) and having a dynamic component and a static component, the dynamic component able to affect a behavior of the static component.
    Type: Grant
    Filed: March 2, 2005
    Date of Patent: October 26, 2010
    Assignee: Metaphor Vision Ltd.
    Inventors: Evgeny Kazakov, Michael Kazakov, Eran Peleg
  • Jitter tolerance testing apparatus, systems, and methods
    Patent number: 7552366
    Abstract: Apparatus, systems, methods, and articles may operate to move an output phase of a clock phase adjustment device associated with a master clock through a plurality of phase shifts relative to a phase of the master clock. A data integrity test may be performed on a serial data receive circuit clocked using an output phase of the clock phase adjustment device following each one of the plurality of phase shifts.
    Type: Grant
    Filed: June 30, 2005
    Date of Patent: June 23, 2009
    Assignee: Intel Corporation
    Inventors: Ofir Kanter, Eran Peleg, Ehud Shoor, Eli Sterin
  • BIST to provide phase interpolator data and associated methods of operation
    Patent number: 7539916
    Abstract: In an embodiment, a phase interpolator (PI) circuit is in an integrated circuit with a test latch, and the test latch is enabled by a test clock signal to under-sample the PI output clock signal from the signal source. In a method of operation, a PI output clock signal is generated in an integrated circuit, and the PI output clock signal is under-sampled in a test latch in the integrated circuit triggered by a test clock signal. Output data from the test latch is transmitted to a test device that is separated from the integrated circuit.
    Type: Grant
    Filed: June 28, 2005
    Date of Patent: May 26, 2009
    Assignee: Intel Corporation
    Inventors: Ofir Kanter, Eran Peleg, Yesayahu Levy
  • BIST to provide jitter data and associated methods of operation
    Patent number: 7516380
    Abstract: In an embodiment, a transmitter circuit is in an integrated circuit die with a test latch, and the test latch is enabled by a test clock signal to under-sample the transmit signal from the transmitter circuit. In a method of operation, a transmit signal is generated in an integrated circuit die, and the transmit signal is under-sampled in a test latch in the integrated circuit triggered by a test clock signal. Output data from the test latch is transmitted to a test device that is separated from the integrated circuit die.
    Type: Grant
    Filed: June 28, 2005
    Date of Patent: April 7, 2009
    Assignee: Intel Corporation
    Inventors: Ofir Kanter, Eran Peleg
  • System for determining endothelial dependent vasoactivity
    Publication number: 20080200820
    Abstract: A method of determining endothelial dependent vasoactivity of a subject, the method is effected by recording pressure-related signals of a plurality of locations adjacent to at least one blood vessel; extracting at least one parameter from the pressure-related signals; and using the at least one parameter to determine a change of at least one characteristic of the at least one blood vessel, the change being representative of endothelial functioning; thereby determining the endothelial dependent vasoactivity of the subject.
    Type: Application
    Filed: April 25, 2008
    Publication date: August 21, 2008
    Applicant: Ramot At Tel Aviv University Ltd.
    Inventors: Giora Amitzur, Shmuel Einav, Eran Peleg, Elya Zimerman
  • System for determining endothelial dependent vasoactivity
    Patent number: 7374541
    Abstract: A method of determining endothelial dependent vasoactivity of a subject, the method is effected by recording pressure-related signals of a plurality of locations adjacent to at least one blood vessel; extracting at least one parameter from the pressure-related signals; and using the at least one parameter to determine a change of at least one characteristic of the at least one blood vessel, the change being representative of endothelial functioning; thereby determining the endothelial dependent vasoactivity of the subject.
    Type: Grant
    Filed: December 3, 2003
    Date of Patent: May 20, 2008
    Assignee: Ramot At Tel Aviv University Ltd.
    Inventors: Giora Amitzur, Shmuel Einav, Eran Peleg, Elya Zimerman
  • Device, system and method for accelerated modeling
    Publication number: 20070180424
    Abstract: Briefly, embodiments of the invention provide, for example, devices, systems and methods for accelerated modeling. A method may include, for example, defining a domain-specific language (100) usable in a modeling environment (700) and having a dynamic component and a static component, the dynamic component able to affect a behavior of the static component.
    Type: Application
    Filed: March 2, 2005
    Publication date: August 2, 2007
    Inventors: Evgeny Kazakov, Michael Kazakov, Eran Peleg
  • Jitter tolerance testing apparatus, systems, and methods
    Publication number: 20070018703
    Abstract: Apparatus, systems, methods, and articles may operate to move an output phase of a clock phase adjustment device associated with a master clock through a plurality of phase shifts relative to a phase of the master clock. A data integrity test may be performed on a serial data receive circuit clocked using an output phase of the clock phase adjustment device following each one of the plurality of phase shifts.
    Type: Application
    Filed: June 30, 2005
    Publication date: January 25, 2007
    Inventors: Ofir Kanter, Eran Peleg, Ehud Shoor, Eli Sterin
  • Clock jitter estimation apparatus, systems, and methods
    Publication number: 20070002994
    Abstract: Apparatus, systems, methods, and articles may operate to estimate an amount of jitter associated with a clock at an output of a digital phase-locked loop (DPLL), wherein the DPLL includes a phase frequency detector (PFD). The estimate may be made by sensing periods of timing coincidence between an up signal on a first output of the PFD and a down signal on a second output of the PFD. A pulse coincidence detector coupled to the PFD and a jitter estimation module coupled to the pulse coincidence detector may perform the estimate.
    Type: Application
    Filed: June 30, 2005
    Publication date: January 4, 2007
    Inventors: Ofir Kanter, Eran Peleg, Aharon El-Bahar
  • BIST to provide jitter data and associated methods of operation
    Publication number: 20060290398
    Abstract: In an embodiment, a transmitter circuit is in an integrated circuit die with a test latch, and the test latch is enabled by a test clock signal to under-sample the transmit signal from the transmitter circuit. In a method of operation, a transmit signal is generated in an integrated circuit die, and the transmit signal is under-sampled in a test latch in the integrated circuit triggered by a test clock signal. Output data from the test latch is transmitted to a test device that is separated from the integrated circuit die.
    Type: Application
    Filed: June 28, 2005
    Publication date: December 28, 2006
    Inventors: Ofir Kanter, Eran Peleg
  • BIST to provide phase interpolator data and associated methods of operation
    Publication number: 20060294442
    Abstract: In an embodiment, a phase interpolator (PI) circuit is in an integrated circuit with a test latch, and the test latch is enabled by a test clock signal to under-sample the PI output clock signal from the signal source. In a method of operation, a PI output clock signal is generated in an integrated circuit, and the PI output clock signal is under-sampled in a test latch in the integrated circuit triggered by a test clock signal. Output data from the test latch is transmitted to a test device that is separated from the integrated circuit.
    Type: Application
    Filed: June 28, 2005
    Publication date: December 28, 2006
    Inventors: Ofir Kanter, Eran Peleg, Yesayahu Levy
  • System for determining endothelial dependent vasoactivity
    Publication number: 20060149152
    Abstract: A method of determining endothelial dependent vasoactivity of a subject, the method is effected by recording pressure-related signals of a plurality of locations adjacent to at least one blood vessel; extracting at least one parameter from the pressure-related signals; and using the at least one parameter to determine a change of at least one characteristic of the at least one blood vessel, the change being representative of endothelial functioning; thereby determining the endothelial dependent vasoactivity of the subject.
    Type: Application
    Filed: December 3, 2003
    Publication date: July 6, 2006
    Inventors: Giora Amitzur, Shmuel Einav, Eran Peleg, Elya Zimmerman