Patents by Inventor Erasmo Perez

Erasmo Perez has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9196977
    Abstract: An apparatus for use in wiring a multi-configurable electrical device during installation thereof at point of operation includes a substrate defining a plurality of tabs separated by at least one gap. The tabs and the gap or gaps are arranged such that when the substrate is positioned proximate the electrical device, the tabs cover a first group of one or more wiring terminals of the electrical device and the gap or gaps provides access to a second group of one or more wiring terminals of the electrical device in accordance with a first wiring configuration of a plurality of possible wiring configurations. According to one exemplary embodiment, the substrate is generally rectangular and non-conductive. Visible indicia may be optionally disposed on the substrate (e.g., by adhering a label containing the indicia to the substrate) to provide information relating to wiring the electrical device according to the first wiring configuration.
    Type: Grant
    Filed: July 30, 2013
    Date of Patent: November 24, 2015
    Assignee: Consert Inc.
    Inventor: Erasmo Perez, Jr.
  • Publication number: 20150037992
    Abstract: An apparatus for use in wiring a multi-configurable electrical device during installation thereof at point of operation includes a substrate defining a plurality of tabs separated by at least one gap. The tabs and the gap or gaps are arranged such that when the substrate is positioned proximate the electrical device, the tabs cover a first group of one or more wiring terminals of the electrical device and the gap or gaps provides access to a second group of one or more wiring terminals of the electrical device in accordance with a first wiring configuration of a plurality of possible wiring configurations. According to one exemplary embodiment, the substrate is generally rectangular and non-conductive. Visible indicia may be optionally disposed on the substrate (e.g., by adhering a label containing the indicia to the substrate) to provide information relating to wiring the electrical device according to the first wiring configuration.
    Type: Application
    Filed: July 30, 2013
    Publication date: February 5, 2015
    Applicant: Consert Inc.
    Inventor: Erasmo Perez, JR.
  • Patent number: 6965157
    Abstract: A very thin, small outline, thermally enhanced semiconductor package includes a leadframe that is coined to form locking features on an exposed die pad and on a plurality of extremely narrow, closely spaced leads. The coined features improve the mechanical locking between the leadframe and the plastic body of the package to increase their resistance to delamination and subsequent penetration by moisture, and enable reliable wire bonds to be made to the otherwise extremely narrow leads.
    Type: Grant
    Filed: December 16, 2003
    Date of Patent: November 15, 2005
    Assignee: Amkor Technology, Inc.
    Inventors: Erasmo Perez, David T. Roman
  • Patent number: 6847103
    Abstract: A very thin, small outline, thermally enhanced semiconductor package includes a leadframe that is coined to form locking features on an exposed die pad and on a plurality of extremely narrow, closely spaced leads. The coined features improve the mechanical locking between the leadframe and the plastic body of the package to increase their resistance to delamination and subsequent penetration by moisture, and enable reliable wire bonds to be made to the otherwise extremely narrow leads.
    Type: Grant
    Filed: November 9, 1999
    Date of Patent: January 25, 2005
    Assignee: Amkor Technology, Inc.
    Inventors: Erasmo Perez, David T. Roman