Abstract: A digital step attenuator for automatic gain control in a transceiver front-end. The digital step attenuator includes a series path coupled between an input port and an output port, a plurality of series shunt switches coupled in parallel to the series path, and a plurality of parallel paths coupled to the series path in parallel. The series path includes a plurality of series resistors coupled in series. Each series shunt switch is for by-passing a different set of one or more series resistors. Each parallel path includes a parallel resistor and a parallel shunt switch, and each parallel path is coupled to either the input port, the output port, or an internal node between two adjacent series resistors, in parallel. A plurality of different ?-attenuators with a different topology are formed by selectively controlling the series shunt switches and the parallel shunt switches.

Abstract: A radio frequency front-end (RF-FE) device with a reconfigurable common-mode feedback control. The device includes a plurality of RF-FE channels and a reconfiguration switch. An RF-FE channel includes a common-mode feedback loop. The common-mode feedback loop is configured to detect a common-mode signal in differential signals in the RF-FE channel and generate a feedback signal to set the common-mode signal. The reconfiguration switch is configured to couple common-mode feedback loops of two or more RF-FE channels based on an operation mode. The reconfiguration switch may be controlled to couple common-mode feedback loops of two or more RF-FE channels if the two or more RF-FE channels receive a same input signal and decouple common-mode feedback loops of two or more RF-FE channels if the two or more RF-FE channels receive different input signals.

Abstract: An N-element baseband (BB) time-domain spatial signal processor system and methodology for large modulated bandwidth multi-antenna receivers are provided. Such a processor generally includes a pipeline converter configured as an asynchronous time-to-digital converter, wherein the asynchronous time-to-digital converter arrangement generates a residue value and an asynchronous pulse and is further arranged to amplify the residue value so as to result in an amplified residue value; and a 2-bit flash time-to-digital-converter configured to quantize the amplified residue value. Thus, a true-time delay spatial signal processing system and technique in the time-domain that enables beamforming, beam-nulling and multiple independent interference cancellation after time-alignment of signals using cascaded voltage-to-time converters and quantization using relaxed pipeline time-to-digital converters is presented.

Abstract: An N-element baseband (BB) time-domain spatial signal processor system and methodology for large modulated bandwidth multi-antenna receivers are provided. Such a processor generally includes a pipeline converter configured as an asynchronous time-to-digital converter, wherein the asynchronous time-to-digital converter arrangement generates a residue value and an asynchronous pulse and is further arranged to amplify the residue value so as to result in an amplified residue value; and a 2-bit flash time-to-digital-converter configured to quantize the amplified residue value. Thus, a true-time delay spatial signal processing system and technique in the time-domain that enables beamforming, beam-nulling and multiple independent interference cancellation after time-alignment of signals using cascaded voltage-to-time converters and quantization using relaxed pipeline time-to-digital converters is presented.

Abstract: A discrete-time delay (TD) technique in a baseband receiver array is disclosed for canceling wide modulated bandwidth spatial interference and reducing the Analog-to-Digital Conversion (ADC) dynamic range requirements. In particular, the discrete-time delay (TD) technique first aligns the interference using non-uniform sampled phases followed by uniform cancellation using a cancellation matrix, such as, for example, a Truncated Hadamard Transform implemented with antipodal binary coefficients.

Abstract: A discrete-time delay (TD) technique in a baseband receiver array is disclosed for canceling wide modulated bandwidth spatial interference and reducing the Analog-to-Digital Conversion (ADC) dynamic range requirements. In particular, the discrete-time delay (TD) technique first aligns the interference using non-uniform sampled phases followed by uniform cancellation using a cancellation matrix, such as, for example, a Truncated Hadamard Transform implemented with antipodal binary coefficients.