Patents by Inventor Eri Fukuda

Eri Fukuda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220223558
    Abstract: A semiconductor device according to the invention of the present application includes a support, a semiconductor chip provided on the support and a die bond material for bonding a back surface of the semiconductor chip to the support, wherein a plurality of cutouts is formed at edges formed between the back surface and side surfaces of the semiconductor chip connected to the back surface, and the die bond material is provided integrally over the plurality of cutouts.
    Type: Application
    Filed: August 27, 2019
    Publication date: July 14, 2022
    Applicant: Mitsubishi Electric Corporation
    Inventors: Tomoyuki ASADA, Eri FUKUDA, Daisuke TSUNAMI
  • Patent number: 10882088
    Abstract: A hard rolled-copper foil which, when heated and laminated on an insulating resin base material, can exhibit excellent bend-resistance characteristics without increasing a final reduction ratio, which, being not prone to develop rolling marks, can maintain a low surface coarseness and can therefore be preferably used in a flexible printed wiring board having excellent high-speed transmission characteristics, which is not prone to softening at room temperature, and which provides excellent operation efficiency and foil passing property when being processed into a flexible printed wiring board after having been stored. A hard rolled-copper foil in which a crystal orientation density in a copper orientation is not less than 10, and a crystal orientation density in a brass orientation is not less than 20.
    Type: Grant
    Filed: November 29, 2017
    Date of Patent: January 5, 2021
    Assignee: FUKUDA METAL FOIL & POWDER CO., LTD.
    Inventors: Nobuaki Morioka, Yuta Sasai, Eri Fukuda
  • Publication number: 20200180000
    Abstract: A hard rolled-copper foil which, when heated and laminated on an insulating resin base material, can exhibit excellent bend-resistance characteristics without increasing a final reduction ratio, which, being not prone to develop rolling marks, can maintain a low surface coarseness and can therefore be preferably used in a flexible printed wiring board having excellent high-speed transmission characteristics, which is not prone to softening at room temperature, and which provides excellent operation efficiency and foil passing property when being processed into a flexible printed wiring board after having been stored. A hard rolled-copper foil in which a crystal orientation density in a copper orientation is not less than 10, and a crystal orientation density in a brass orientation is not less than 20.
    Type: Application
    Filed: November 29, 2017
    Publication date: June 11, 2020
    Applicant: FUKUDA METAL FOIL & POWDER CO., LTD.
    Inventors: Nobuaki MORIOKA, Yuta SASAI, Eri FUKUDA
  • Patent number: 9800210
    Abstract: A power amplifier includes: a plurality of FET cells connected in parallel to each other; a plurality of first resistors connected between gate terminals of the plurality of FET cells and grounding terminals respectively; a plurality of second resistors having one ends connected to the gate terminals of the plurality of FET cells respectively and other ends connected to each other; a plurality of capacitors connected in parallel to the plurality of second resistors respectively; and a third resistor connected between a connection point of the other ends of the plurality of second resistors and a power supply terminal, wherein the first resistors have temperature coefficients of resistance greater than those of the second and third resistors and are arranged closer to the corresponding FET cells than the third resistor.
    Type: Grant
    Filed: August 29, 2016
    Date of Patent: October 24, 2017
    Assignee: Mitsubishi Electric Corporation
    Inventors: Katsuya Kato, Naoki Kosaka, Eri Fukuda, Shigeru Fujiwara, Atsushi Okamura, Kenichiro Chomei
  • Publication number: 20170207753
    Abstract: A power amplifier includes: a plurality of FET cells connected in parallel to each other; a plurality of first resistors connected between gate terminals of the plurality of FET cells and grounding terminals respectively; a plurality of second resistors having one ends connected to the gate terminals of the plurality of FET cells respectively and other ends connected to each other; a plurality of capacitors connected in parallel to the plurality of second resistors respectively; and a third resistor connected between a connection point of the other ends of the plurality of second resistors and a power supply terminal, wherein the first resistors have temperature coefficients of resistance greater than those of the second and third resistors and are arranged closer to the corresponding FET cells than the third resistor.
    Type: Application
    Filed: August 29, 2016
    Publication date: July 20, 2017
    Applicant: Mitsubishi Electric Corporation
    Inventors: Katsuya KATO, Naoki KOSAKA, Eri FUKUDA, Shigeru FUJIWARA, Atsushi OKAMURA, Kenichiro CHOMEI
  • Patent number: 8890622
    Abstract: A cascode amplifier includes: first transistors; second transistors cascode-connected with respective first transistors; a first line connected at spaced points to control terminals of the first transistors; a second line connected at spaced points to control terminals of the second transistors; and a capacitance connected between one end of the second line and ground. The second line includes at least two lines connected in parallel with each other.
    Type: Grant
    Filed: June 3, 2013
    Date of Patent: November 18, 2014
    Assignee: Mitsubishi Electric Corporation
    Inventors: Miyo Miyashita, Kazuya Yamamoto, Fumimasa Kitabayashi, Suguru Maki, Eri Fukuda, Katsuya Kato
  • Publication number: 20140132358
    Abstract: A cascode amplifier includes: first transistors; second transistors cascode-connected with respective first transistors; a first line connected at spaced points to control terminals of the first transistors; a second line connected at spaced points to control terminals of the second transistors; and a capacitance connected between one end of the second line and ground. The second line includes at least two lines connected in parallel with each other.
    Type: Application
    Filed: June 3, 2013
    Publication date: May 15, 2014
    Inventors: Miyo Miyashita, Kazuya Yamamoto, Fumimasa Kitabayashi, Suguru Maki, Eri Fukuda, Katsuya Kato