Patents by Inventor Eri Murata

Eri Murata has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210269454
    Abstract: The present invention provides a compound or a pharmaceutically acceptable salt thereof having an inhibitory action on the interaction between menin and an MLL protein. The compound represented by the formula (1) or a pharmaceutically acceptable salt thereof. wherein, in the formula (1), the dotted circle, R1, R2, R3, R4, R5, R6, R7, R8, Ring Q1, W, m and n are each as defined in the description.
    Type: Application
    Filed: April 28, 2021
    Publication date: September 2, 2021
    Applicant: Daiichi Sankyo Company, Limited
    Inventors: Kenji Yoshikawa, Noriyasu Haginoya, Tomoaki Hamada, Ryutaro Kanada, Jun Watanabe, Yoshiko Kagoshima, Eri Tokumaru, Kenji Murata, Takayuki Baba, Mayumi Kitagawa, Akiko Kurimoto, Masashi Numata, Machiko Shiroishi, Taeko Shinozaki
  • Patent number: 6393058
    Abstract: A moving picture coding system for controlling a quantizer in response to a generated bit amount is improved in that moving pictures are coded depending on whether frames of the moving pictures attach greater importance on the motion smoothness or on the image clarity. A quantization variation value which is a variation of a quantization step size between different frames is calculated by a variation value calculation section from a bit amount calculated by a generated bit amount calculation section. The quantization variation value is positive or negative in sign with a frame which involves a great amount or a small amount of variation. Only when the quantization variation value is positive or negative in sign, the frame is determined by a variation value correction frame determination section as a frame for which correction of the variation value should be performed.
    Type: Grant
    Filed: September 19, 1996
    Date of Patent: May 21, 2002
    Assignee: NEC Corporation
    Inventor: Eri Murata
  • Patent number: 6119140
    Abstract: An 8.times.8 two-dimensional discrete inverse cosine transform circuit includes two row arithmetic sections each of which implement an 8-point one-dimensional inverse discrete cosine transform in a row direction, a replacement section which replaces the arithmetic results of the row arithmetic sections with replacement data, and two column arithmetic sections each of which receive parts of the replacement data from the replacement section and implement an 8-point one-dimensional inverse discrete cosine transform in a column direction. Each of the arithmetic sections include a 16-bit four parallel adder and subtracter and a 16-bit four parallel multiply-accumulate unit with polarity symmetric rounding function.
    Type: Grant
    Filed: January 8, 1998
    Date of Patent: September 12, 2000
    Assignee: NEC Corporation
    Inventors: Eri Murata, Ichiro Kuroda
  • Patent number: 5964824
    Abstract: The invention provides a high speed two-dimensional discrete cosine transform circuit which can reduce the number of addition operations for rounding to one time. The two-dimensional IDCT circuit calculates M.times.N-point two-dimensional inverse discrete cosine transforms wherein M.times.N is equal to 2.sup.2n, and includes an M.times.N two-dimensional IDCT operator for calculating two-dimensional inverse discrete cosine transforms as matrix vector products of a transform matrix of MN rows and MN columns and MNth-order input vectors, a shift operator for shifting results of the calculation of the M.times.N two-dimensional IDCT operator rightwardly, and an adder for adding 2.sup.n-2 to a discrete cosine coefficient from among discrete cosine transform coefficients to be inputted to the M.times.N two-dimensional IDCT operator. An output signal of the shift operator is outputted as a circuit output signal of the two-dimensional IDCT circuit.
    Type: Grant
    Filed: January 31, 1997
    Date of Patent: October 12, 1999
    Assignee: NEC Coporation
    Inventors: Eri Murata, Ichiro Kuroda
  • Patent number: 5917736
    Abstract: First to ninth determining units that receive input data of first to ninth tensor product calculating units are disposed. The first to ninth determining units determine whether or not the received data have non-zero data and supply the determined results to the relevant tensor product calculating units. When the first to ninth determining units have determined that all of the received data are zero data, the first to ninth tensor product calculating units do not perform tensor product calculations.
    Type: Grant
    Filed: August 11, 1997
    Date of Patent: June 29, 1999
    Assignee: NEC Corporation
    Inventors: Eri Murata, Ichiro Kuroda
  • Patent number: 5721589
    Abstract: A moving picture coding apparatus wherein the amount of operation for calculation of an quantization step size to be used for coding of a picture signal by a coding section is reduced includes a bit amount estimation section estimates an amount of bits to be generated for a currently inputted frame using a predetermined estimated quantization step size. A coding section encodes the currently inputted frame using a quantization step size.
    Type: Grant
    Filed: August 22, 1995
    Date of Patent: February 24, 1998
    Assignee: NEC Corporation
    Inventor: Eri Murata
  • Patent number: 5515114
    Abstract: A frame difference accumulator accumulates differences between the present frame and the previous frame of an input video signal in each block and outputs an accumulated value of each block. A motion detector detects a candidate motion vector and an evaluation function value of the candidate motion vector in each block. A region detector outputs a threshold selection control signal on the basis of the accumulated value. A threshold selector selects one of a low threshold and a high threshold as a selected threshold in each block. A comparing section compares a difference between the accumulated value and the evaluation function value with the selected threshold and outputs a vector selection control signal. A vector selector selects one of a zero vector and the candidate motion vector as a motion vector of each block.
    Type: Grant
    Filed: September 27, 1994
    Date of Patent: May 7, 1996
    Assignee: NEC Corporation
    Inventor: Eri Murata
  • Patent number: 5396292
    Abstract: A subtracter (20) supplies a prediction error signal (21), derived from a prediction signal (101) and an input motion video signal (1). A quantizer (30) quantizes the prediction error signal to generate a quantized prediction error signal (31). A reproduced prediction error signal (81) reproduced by an inverse-quantizer (80) is added to the prediction signal by an adder 90, and the sum is supplied to the predictor (100), which generates the prediction error signal. The quantized prediction error signal is converted by a variable word length coder (40) into a variable word length code sequence. A generated information quantity calculating section (50) counts the number of bits in the sequence frame by frame. A quantization characteristic determining circuit (60) supplies, on the basis of the result of counting, a controller (70) with a quantization characteristic candidate signal 61 indicating the candidate of the quantization characteristic to be used in the next frame.
    Type: Grant
    Filed: February 25, 1993
    Date of Patent: March 7, 1995
    Assignee: NEC Corporation
    Inventor: Eri Murata
  • Patent number: 5258836
    Abstract: A valid/invalid detection section 1 generates an original valid block map based on a difference between frames. The current and previous valid block maps are weighted within weight sections 2 and 3 respectively and are thereafter summed up to compose them. After isolated valid blocks are removed from the composed valid block map within a segmentation section 5, it is determined whether or not a moving object exists and the direction of the moving object is determined based on the distribution of the valid block map. If a significant movement is detected, then blocks around the object are weighted at the movement direction side. Another segmentation section 7 determines valid blocks with reference to interest blocks and neighbor blocks, and isolated invalid block section 8 removes isolated invalid blocks to generate a complete valid block map. Encoding is performed based on the complete valid block map.
    Type: Grant
    Filed: May 5, 1992
    Date of Patent: November 2, 1993
    Assignee: NEC Corporation
    Inventor: Eri Murata
  • Patent number: 5177608
    Abstract: According to a method and apparatus for coding a moving image signal, a change between a current frame and a previous frame is detected in units of blocks obtained by dividing a frame constituted by an input moving image signal into a plurality of pixels. A first valid block map is formed in units of frames by determining valid and invalid blocks on the basis of the detected changes. A first weighting operation of the formed first valid block map is performed. A second weighting operation of a fourth valid block map of the previous frame is performed. A weighted second valid block map is obtained by adding/synthesizing the first and fourth valid block maps respectively subjected to the first and second weighting operations. A third valid block map is obtained by performing predetermined segmentation of the second valid block map. A fourth valid block map is obtained by determining validity of an isolated invalid block in the third valid block map by referring to neighboring blocks.
    Type: Grant
    Filed: September 20, 1991
    Date of Patent: January 5, 1993
    Assignee: NEC Corporation
    Inventors: Junichi Ohki, Eri Murata