Patents by Inventor Eric A. Lahaug

Eric A. Lahaug has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9053928
    Abstract: The present disclosure provides a wafer that can be used in coating films. The wafer includes a front surface, a back surface opposite to the front surface, and a plurality of trenches. The back surface further includes a central region and a surrounding region. The trenches are disposed on the back surface. The spacing between any two adjacent trenches in surrounding region is less than the spacing between any two adjacent trenches in the central region.
    Type: Grant
    Filed: March 6, 2014
    Date of Patent: June 9, 2015
    Assignee: Inotera Memories, Inc.
    Inventors: Eric Lahaug, Chia-Ming Yang, Regan Stanley Tsui
  • Publication number: 20140264774
    Abstract: The present disclosure provides a wafer that can be used in coating films. The wafer includes a front surface, a back surface opposite to the front surface, and a plurality of trenches. The back surface further includes a central region and a surrounding region. The trenches are disposed on the back surface. The spacing between any two adjacent trenches in surrounding region is less than the spacing between any two adjacent trenches in the central region.
    Type: Application
    Filed: March 6, 2014
    Publication date: September 18, 2014
    Applicant: INOTERA MEMORIES, INC.
    Inventors: ERIC LAHAUG, CHIA-MING YANG, REGAN STANLEY TSUI
  • Publication number: 20130234280
    Abstract: A manufacturing method of STI in DRAM includes the following steps. Step 1 is providing a substrate and step 2 is forming at least one trench in the substrate. Step 3 is doping at least one of side portions and bottom portions of the trench with a dopant. Step 4 is forming an oxidation inside the trench and step 5 is providing a planarization step to remove the oxidation. The stress of the corners of STI is reduced so as to modify the defect of the substrate and improve the DRAM variability in retention time.
    Type: Application
    Filed: March 16, 2012
    Publication date: September 12, 2013
    Applicant: INOTERA MEMORIES, INC.
    Inventors: ARVIND KUMAR, ERIC LAHAUG, DEVESH KUMAR DATTA, KEEN WAH CHOW, CHIA MING YANG, CHIEN-CHI LEE, FREDERICK DAVID FISHBURN
  • Patent number: 6716685
    Abstract: Methods of forming dual gate oxides are provided. A first gate oxide layer and oxynitride layer is formed over a substrate. A portion of the first gate oxide and oxynitride layers is removed over a second area of the substrate, and a second gate oxide is formed thereon. The first gate oxide layer is simultaneously reoxidized. The reoxidized first gate oxide layer incorporates oxynitride and is thinner than a second gate oxide layer. Methods of forming the semiconductor devices and memory cells are also provided. It is emphasized that this abstract is provided to comply with the rules requiring an abstract which will allow a searcher or other reader to quickly ascertain the subject matter of the technical disclosure. It is submitted with the understanding that is will not be used to interpret or limit the scope or meaning of the claims.
    Type: Grant
    Filed: August 9, 2002
    Date of Patent: April 6, 2004
    Assignee: Micron Technology, Inc.
    Inventor: Eric Lahaug
  • Publication number: 20040029328
    Abstract: Methods of forming dual gate oxides are provided. A first gate oxide layer and oxynitride layer is formed over a substrate. A portion of the first gate oxide and oxynitride layers is removed over a second area of the substrate, and a second gate oxide is formed thereon. The first gate oxide layer is simultaneously reoxidized. The reoxidized first gate oxide layer incorporates oxynitride and is thinner than a second gate oxide layer. Methods of forming the semiconductor devices and memory cells are also provided. It is emphasized that this abstract is provided to comply with the rules requiring an abstract which will allow a searcher or other reader to quickly ascertain the subject matter of the technical disclosure. It is submitted with the understanding that is will not be used to interpret or limit the scope or meaning of the claims. 37 CFR 1.72(b).
    Type: Application
    Filed: August 9, 2002
    Publication date: February 12, 2004
    Inventor: Eric Lahaug
  • Patent number: 6338938
    Abstract: In one aspect the invention includes a method of forming a semiconductor device, comprising: a) forming a layer over a substrate; b) forming a plurality of openings extending into the layer; c) depositing particles on the layer; d) collecting the particles within the openings; and e) using the collected particles as a mask during etching of the underlying substrate to define features of the semiconductor device. In another aspect, the invention includes a method of forming a field emission display, comprising: a) forming a silicon dioxide layer over a conductive substrate; b) forming a plurality of openings extending into the silicon dioxide layer; c) depositing particles on the silicon dioxide layer; d) collecting the particles within the openings; e) while using the collected particles as a mask, etching the conductive substrate to form a plurality of conically shaped emitters from the conductive substrate; and f) forming a display screen spaced from said emitters.
    Type: Grant
    Filed: January 25, 2000
    Date of Patent: January 15, 2002
    Assignee: Micron Technology, Inc.
    Inventor: Eric A. Lahaug
  • Patent number: 6037104
    Abstract: In one aspect the invention includes a method of forming a semiconductor device, comprising: a) forming a layer over a substrate; b) forming a plurality of openings extending into the layer; c) depositing particles on the layer; d) collecting the particles within the openings; and e) using the collected particles as a mask during etching of the underlying substrate to define features of the semiconductor device. In another aspect, the invention includes a method of forming a field emission display, comprising: a) forming a silicon dioxide layer over a conductive substrate; b) forming a plurality of openings extending into the silicon dioxide layer; c) depositing particles on the silicon dioxide layer; d) collecting the particles within the openings; e) while using the collected particles as a mask, etching the conductive substrate to form a plurality of conically shaped emitters from the conductive substrate; and f) forming a display screen spaced from said emitters.
    Type: Grant
    Filed: September 1, 1998
    Date of Patent: March 14, 2000
    Assignee: Micron Display Technology, Inc.
    Inventor: Eric A. Lahaug