Patents by Inventor Eric A. Miller

Eric A. Miller has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Dual width finned semiconductor structure
    Patent number: 11189532
    Abstract: A finned semiconductor structure including sets of relatively wide and relatively narrow fins is obtained by employing hard masks having different quality. A relatively porous hard mask is formed over a first region of a semiconductor substrate and a relatively dense hard mask is formed over a second region of the substrate. Patterning of the different hard masks using a sidewall image transfer process causes greater lateral etching of the relatively porous hard mask than the relatively dense hard mask. A subsequent reactive ion etch to form semiconductor fins causes relatively narrow fins to be formed beneath the relatively porous hard mask and relatively wide fins to be formed beneath the relatively dense hard mask.
    Type: Grant
    Filed: December 15, 2019
    Date of Patent: November 30, 2021
    Assignee: International Business Machines Corporation
    Inventors: Yi Song, Jay W. Strane, Eric Miller, Fee Li Lie, Richard A. Conti
  • Systems and methods for intelligently managing storage space occupied by media assets
    Patent number: 11178449
    Abstract: Systems and methods are provided reducing storage space occupied by a media asset by adjusting quality levels of the media asset downward over time. This may be accomplished by a media guidance application that store, at a given time, the media asset in a first format having a first quality level. The media guidance application retrieves, from a database, a data entry corresponding to the media asset and determines, based on the data entry, a threshold period of time for storing the media asset in the first format. The media guidance application detects whether the threshold period of time since the given time has passed and responds by altering a first portion of the media asset from the first format having the first quality level to a second format having a second quality level that is inferior to the first quality level.
    Type: Grant
    Filed: March 9, 2018
    Date of Patent: November 16, 2021
    Assignee: Rovi Guides, Inc.
    Inventors: Clayton Kim, Lucas Waye, Richard Eric Miller, Matthew John Emerson
  • SYSTEMS AND METHODS FOR THERMAL SIDE-CHANNEL ANALYSIS AND MALWARE DETECTION
    Publication number: 20210349998
    Abstract: In some embodiments, the present disclosure provides systems and methods for detecting malware, including receiving thermal images of an integrated circuit, and generating a power density profile using at least one of the thermal images. The present disclosure further includes comparing the power density profile to an expected power density profile of the integrated circuit, and determining, based on the comparison, if the integrated circuit is in an abnormal operating state.
    Type: Application
    Filed: October 7, 2019
    Publication date: November 11, 2021
    Inventors: Mark Hempstead, David Werner, Eric Miller, Kyle Juretus, Ioannis Savadis
  • VISUAL OBSERVER FOR UNMANNED AERIAL VEHICLES
    Publication number: 20210350162
    Abstract: In some examples, a device may receive, from a first camera, a plurality of images of an airspace corresponding to an area of operation of an unmanned aerial vehicle (UAV). The device may detect, based on the plurality of images from the first camera, a candidate object approaching or within the airspace. Based on detecting the candidate object, the device may control a second camera to direct a field of view of the second camera toward the candidate object. Further, based on images from the second camera captured at a first location and images from at least one other camera captured at a second location, the candidate object may be determined to be an object of interest. In addition, at least one action may be taken based on determining that the candidate object is the object of interest.
    Type: Application
    Filed: May 7, 2021
    Publication date: November 11, 2021
    Inventors: Eric Miller, Jacob Daniel PHILLIPS
  • VERTICAL TUNNELING FIELD EFFECT TRANSISTOR WITH DUAL LINER BOTTOM SPACER
    Publication number: 20210351082
    Abstract: Embodiments of the present invention are directed to fabrication method and resulting structures for vertical tunneling field effect transistors (VFETs) having a dual liner bottom spacer. In a non-limiting embodiment of the invention, a first liner is formed on a top surface of a source or drain (S/D) region and sidewalls of a semiconductor fin. Portions of a spacer are removed to expose a first region and a second region of the first liner. The first region of the first liner is directly on the S/D region and the second region is over the semiconductor fin. A second liner is formed on the first liner. A first portion of the second liner is formed by selectively depositing dielectric material on the exposed first region and exposed second region of the first liner. The first liner and the second liner collectively define the dual liner bottom spacer.
    Type: Application
    Filed: July 22, 2021
    Publication date: November 11, 2021
    Inventors: Eric Miller, Marc A. Bergendahl, Kangguo Cheng, Sean Teehan, John Sporre
  • Laser-based rangefinding instrument
    Patent number: 11168982
    Abstract: A laser-based rangefinding instrument for, inter alia, golfing or hunting activities having an unique ergonomic design and an external multi-function switch for controlling display brightness, selectable display of differing distance units and a slope selection switch for enabling display of line of sight distance or angle of slope and “Compensated Golf Distance” angle corrected distance to a target.
    Type: Grant
    Filed: February 13, 2018
    Date of Patent: November 9, 2021
    Assignees: Laser Technology, Inc., Kama-Tech (HK) Limited
    Inventors: Jordan T. Vermillion, Scott M. Peterson, Neil T. Heeke, Eric A. Miller, Jeremy G. Dunne, David W. Williams
  • SACRIFICIAL FIN FOR CONTACT SELF-ALIGNMENT
    Publication number: 20210328041
    Abstract: A method is presented for forming a self-aligned middle-of-the-line (MOL) contact. The method includes forming a fin structure over a substrate, depositing and etching a first set of dielectric layers over the fin structure, etching the fin structure to form a sacrificial fin and a plurality of active fins, depositing a work function metal layer over the plurality of active fins, depositing an inter-layer dielectric (ILD) and a second set of dielectric layers. The method further includes etching the second set of dielectric layers and the ILD to form a first via portion and to expose a top surface of the sacrificial fin, removing the sacrificial fin to form a second via portion, and filling the first and second via portions with a conductive material to form the MOL contact in the first via portion and a contact landing in the second via portion.
    Type: Application
    Filed: April 15, 2020
    Publication date: October 21, 2021
    Inventors: Yann Mignot, Indira Seshadri, Su Chen Fan, Christopher J. Waskiewicz, Eric Miller
  • X-ray tube insulation, window, and focusing plate
    Patent number: 11152184
    Abstract: X-ray transparent insulation can be sandwiched between an x-ray window and a ground plate. The x-ray transparent insulation can include aluminum nitride, boron nitride, or polyetherimide. The x-ray transparent insulation can include a curved side. The x-ray transparent insulation can be transparent to x-rays and resistant to x-ray damage, and can have high thermal conductivity. An x-ray window can have high thermal conductivity, high electrical conductivity, high melting point, low cost, and matched coefficient of thermal conductivity with the anode. The x-ray window can be made of tungsten. For consistent x-ray spot size and location, a focusing plate and a filament can be attached to a cathode with an open channel of the focusing plate aligned with a longitudinal dimension of the filament. Tabs of the focusing plate bordering the open channel can be bent to align with a location of the filament.
    Type: Grant
    Filed: July 23, 2020
    Date of Patent: October 19, 2021
    Assignee: Moxtek, Inc.
    Inventors: Todd S. Parker, Eric Miller
  • Vertical tunneling field effect transistor with dual liner bottom spacer
    Patent number: 11152266
    Abstract: Embodiments of the present invention are directed to fabrication method and resulting structures for vertical tunneling field effect transistors (VFETs) having a dual liner bottom spacer. In a non-limiting embodiment of the invention, a first liner is formed on a top surface of a source or drain (S/D) region and sidewalls of a semiconductor fin. Portions of a spacer are removed to expose a first region and a second region of the first liner. The first region of the first liner is directly on the S/D region and the second region is over the semiconductor fin. A second liner is formed on the first liner. A first portion of the second liner is formed by selectively depositing dielectric material on the exposed first region and exposed second region of the first liner. The first liner and the second liner collectively define the dual liner bottom spacer.
    Type: Grant
    Filed: October 2, 2019
    Date of Patent: October 19, 2021
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Eric Miller, Marc A. Bergendahl, Kangguo Cheng, Sean Teehan, John Sporre
  • SUBLITHOGRAPHY GATE CUT PHYSICAL UNCLONABLE FUNCTION
    Publication number: 20210320190
    Abstract: Methods, and devices related to authentication of chips using physical unclonable function (PUF) are disclosed. The semiconductor chip includes a substrate. The semiconductor chip includes multiple devices formed on the substrate. Each device includes multiple fins. A gate is formed on the multiple fins with a gate cut (CT) design that results in random distribution of complete gate cut and incomplete gate cut for each of the multiple devices based on a natural process variation in semiconductor manufacturing for each device. A physical unclonable function (PUF) region is defined in accordance with the random distribution.
    Type: Application
    Filed: April 14, 2020
    Publication date: October 14, 2021
    Inventors: Kangguo Cheng, Eric Miller, Fee Li Lie, Gauri Karve, Marc A. Bergendahl, John Ryan Sporre
  • SELF-ALIGNED UNIFORM BOTTOM SPACERS FOR VTFETS
    Publication number: 20210320186
    Abstract: Semiconductor devices and methods of forming the same include forming a bottom source/drain structure around a fin. A multi-layer bottom spacer is formed on the bottom source/drain structure, around the fin. Each layer of the multi-layer bottom spacer has a respective vertical height above the bottom source/drain structure, with a layer of the multi-layer bottom spacer that is farthest from the fin having a greater vertical height than a layer that is closest to the fin, to address parasitic capacitance from the bottom source/drain structure.
    Type: Application
    Filed: April 14, 2020
    Publication date: October 14, 2021
    Inventors: Ruilong Xie, Hemanth Jagannathan, Jay William Strane, Eric Miller
  • PHYSICAL UNCLONABLE FUNCTION
    Publication number: 20210320070
    Abstract: Methods, and devices related to authentication of chips using physical unclonable function (PUF) are disclosed. The semiconductor chip has a substrate having a major surface. The semiconductor chip has a boundary defined on the major surface in accordance with a ground rule associated with a gate cut passing (CT) fin formed on the major surface. The semiconductor chip has multiple non-planar devices fabricated on the surface at the boundary. The CT fin forms a random distribution of field effect transistors (FETs) with varying work function metal (WFM) thickness that includes some FETs that fail the ground rule and other FETs that meet the ground rule. A physical unclonable function (PUF) region is defined in accordance with the random distribution.
    Type: Application
    Filed: April 9, 2020
    Publication date: October 14, 2021
    Inventors: Kangguo Cheng, Eric Miller, Fee Li Lie, Gauri Karve, Marc A. Bergendahl, John Sporre
  • Protective shield for use with a staple gun
    Patent number: 11141849
    Abstract: A staple gun and a method of using the same. A stapling mechanism in the housing is activated to deliver a staple through an aperture in a housing wall and drive the staple into a surface around a stack of one or more electric cables. The gun includes a reciprocating cable guide for centering the gun on the stack of cables and closing a safety switch to permit the gun's trigger to be activated. A spacer extending outwardly from the housing wall rests on the upper surface of the cable stack. The spacer and a bumper that engages a hammer of the stapling mechanism provide for automatic depth adjustment when driving the staple into the surface. A reciprocating cable guard extending outwardly from the housing wall is positioned between the stack of cables and the staple to aid in preventing the staple from piercing the cable.
    Type: Grant
    Filed: November 19, 2018
    Date of Patent: October 12, 2021
    Assignee: BRAHMA INDUSTRIES LLC
    Inventors: Mark Ferris, Eric A. Miller, Jr., John D. Fiegener, Marcus R. Hanna, Ryan Thompson, William P. Liteplo
  • BOTTOM SOURCE/DRAIN ETCH WITH FIN-CUT-LAST-VTFET
    Publication number: 20210288164
    Abstract: A technique relates to a semiconductor device. A first epitaxial material is formed under a bottom surface of a set of fins, the first epitaxial material being under fin channel regions of the set of fins. A second epitaxial material is formed adjacent to the first epitaxial material and remote from the fin channel regions, a combination of the first epitaxial material and the second epitaxial material forming a bottom source or drain (source/drain) layer. A top source/drain layer is formed on an upper portion of the set of fins, gate material being disposed around the set of fins between the top source/drain layer and the bottom source/drain layer.
    Type: Application
    Filed: March 10, 2020
    Publication date: September 16, 2021
    Inventors: Tao Li, Indira SESHADRI, NELSON FELIX, ERIC MILLER
  • Flush-mounting fixture mounts
    Patent number: 11118766
    Abstract: Some fixture mounts include a body that is couplable to a structure, the body having an upper surface, a lower surface, and a peripheral surface that connects the upper and lower surfaces and defines one or more ledges, wherein the body is couplable to a fixture such that each of first and second protruding features of the fixture is received between one of the ledge(s) and the upper surface. In some fixture mounts, the protruding features are slidable along the ledge(s) above which they are received such that the fixture is rotatable relative to the body. In some fixture mounts, at least one of the ledge(s) is tapered such that, as a protruding feature of the fixture that is received above the ledge is moved toward the ledge, the fixture is urged toward the upper surface.
    Type: Grant
    Filed: March 5, 2020
    Date of Patent: September 14, 2021
    Assignee: LUCIFER LIGHTING COMPANY
    Inventors: Ryan Thompson, Eric Miller, Ben Karpen, Daniel Garcia, Chris Reed
  • Flush-Mounting Fixture Mounts
    Publication number: 20210278065
    Abstract: Some fixture mounts include a body that is couplable to a structure, the body having an upper surface, a lower surface, and a peripheral surface that connects the upper and lower surfaces and defines one or more ledges, wherein the body is couplable to a fixture such that each of first and second protruding features of the fixture is received between one of the ledge(s) and the upper surface. In some fixture mounts, the protruding features are slidable along the ledge(s) above which they are received such that the fixture is rotatable relative to the body. In some fixture mounts, at least one of the ledge(s) is tapered such that, as a protruding feature of the fixture that is received above the ledge is moved toward the ledge, the fixture is urged toward the upper surface.
    Type: Application
    Filed: March 5, 2020
    Publication date: September 9, 2021
    Applicant: Lucifer Lighting Company
    Inventors: Ryan Thompson, Eric Miller, Ben Karpen, Daniel Garcia, Chris Reed
  • Interlocking blending system
    Patent number: 11103107
    Abstract: A blending system is shown and described herein. The blending system may include a base including a motor, a blade selectively and operably engaged with the base, where the motor rotates the blade, a container having an open end and a lid configured to cover the open end. The blending system may also include an interlock system that may include a plurality of induction coils positioned on the base and the container and be in electrical communication with at least one lid sensor, wherein the power is translated through the induction coils to engage a switch device to complete a power circuit to allow a user to operate the motor of the blender.
    Type: Grant
    Filed: February 17, 2016
    Date of Patent: August 31, 2021
    Assignee: VITA-MIX MANAGEMENT CORPORATION
    Inventors: David J. Kolar, Saifur Tareen, Eric Miller
  • Laser-etching and machine-vision positioning system
    Patent number: 11084123
    Abstract: Systems, methods and computer program products for laser etching and robotic machining of large workpieces are disclosed. An example system includes a first ring of lasers configured to etch longitudinal gridlines on a workpiece, a second ring of lasers configured to etch circumferential gridlines on the workpiece, where the longitudinal gridlines and the circumferential gridlines define a working grid on the workpiece, and a machine vision system to scan the working grid and compare the working grid to a reference grid in a computer model of the workpiece and to determine offsets between the working grid and the reference grid for positioning a robotic machining tool.
    Type: Grant
    Filed: September 5, 2019
    Date of Patent: August 10, 2021
    Assignee: The Boeing Company
    Inventors: James Alan Aske, Tyler Emerson Berkey, John Eric Miller
  • NETWORK MESSAGE TRANSMISSIONS REDUCTION SYSTEMS AND METHODS
    Publication number: 20210243673
    Abstract: Systems and methods for reducing the amount of messages transmitted in large-scale distributed mesh networks are disclosed. Network components include transceivers and memory storing instructions which, when executed by a processing unit, reduce transmissions made by the transceiver within the network. The instructions executed by processing unit could (1) create an expiration parameter to limit the number of times a signal is retransmitted, (2) form groups of network components from which one or a few of the group network components are designated to respond on behalf of the group, (3) keep advertising transmissions dormant by default until called upon, (4) employ a time delay parameter for a time interval in which no transmission may be made, and (5) include message IDs in control signals that are transmitted.
    Type: Application
    Filed: April 19, 2021
    Publication date: August 5, 2021
    Inventors: Eric Miller, James Hawkins, Sebastian R. Borda, Federico Pfaffendorf, Keenan McCall
  • Transistor gate having tapered segments positioned above the fin channel
    Patent number: 11075299
    Abstract: Embodiments of the invention are directed to a method that includes forming a fin over a major surface of a substrate. The fin includes an active fin region having a top fin surface and a fin sidewall. The top fin surface is substantially parallel with respect to the major surface, and the fin sidewall is substantially perpendicular with respect to the major surface. A gate is formed over and around a central portion of the fin, the gate having a bottom gate region and a top gate region. The bottom gate region is substantially below the top fin surface and includes a bottom gate region sidewall that is substantially parallel with respect to the fin sidewall. The top gate region is substantially above the top fin surface and includes a top gate region sidewall that is at an angle with respect to the major surface.
    Type: Grant
    Filed: July 1, 2019
    Date of Patent: July 27, 2021
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Eric Miller, Gauri Karve, Marc A. Bergendahl, Fee Li Lie, Kangguo Cheng, Sean Teehan