Patents by Inventor Eric Andre

Eric Andre has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250264902
    Abstract: A biasing device for variable capacitance is provided. An example device comprises a first circuit. The first circuit delivers a first current flowing through a first resistive element receiving a temperature-stable voltage, and a second current proportional to temperature. A second resistive element comprises MOS transistors in series and connected as a diode, and has a first terminal connected to a reference potential and a second terminal coupled to a power supply potential. A second circuit delivers, in the second resistive element, a copy of the first current. A third circuit applies a voltage to a back gate of the transistors, determined by the second current.
    Type: Application
    Filed: February 6, 2025
    Publication date: August 21, 2025
    Inventors: Olivier TOUZARD, Eric ANDRE
  • Publication number: 20240178817
    Abstract: In embodiments, a radio frequency transmitter comprising at least one filtering circuit is provided. The filtering circuit includes a series/parallel shift register comprising a binary input and N binary outputs, with N being an integer greater than or equal to OSR, OSR being an integer greater than or equal to 2. The binary outputs ranging from 0 to N?1, the register receiving a binary data signal at a data frequency on its input and implementing shifts on the N binary outputs at a frequency equal to a multiplier of the data frequency and OSR. The filtering circuit further comprising a first circuit defined by N coefficients Ci. For each non-zero coefficient Ci, a signal determined by the coefficient Ci and by the corresponding one of the binary outputs. The filtering circuit further comprising and an adder circuit delivering an output equal to the sum of analog signals.
    Type: Application
    Filed: November 27, 2023
    Publication date: May 30, 2024
    Inventors: Eric Andre, Lionel Vogt
  • Patent number: 11757686
    Abstract: In an embodiment a device includes a first circuit and a second circuit, wherein the first circuit is configured to generate a fourth signal and a fifth signal by applying the phase shift respectively to a first signal and to a second signal and deliver a sixth signal corresponding to a sampling over one bit of the fourth signal, a seventh signal corresponding to a sampling over one bit of the fifth signal, an eighth signal corresponding to a sampling over one bit of a difference between the fourth and fifth signals, and a ninth signal corresponding to a sampling over one bit of a sum between the fourth and fifth signals, wherein the second circuit is configured to receive the sixth, seventh, eighth, and ninth signals and determine, during a first phase where the first and second signals are representative of a first known symbol of a QPSK constellation, a state of a first bit from among a first state and a second state based on the eighth and ninth signals.
    Type: Grant
    Filed: July 29, 2022
    Date of Patent: September 12, 2023
    Assignee: STMicroelectronics SA
    Inventors: Eric Andre, Lionel Vogt
  • Publication number: 20230034119
    Abstract: In an embodiment a device includes a first circuit and a second circuit, wherein the first circuit is configured to generate a fourth signal and a fifth signal by applying the phase shift respectively to a first signal and to a second signal and deliver a sixth signal corresponding to a sampling over one bit of the fourth signal, a seventh signal corresponding to a sampling over one bit of the fifth signal, an eighth signal corresponding to a sampling over one bit of a difference between the fourth and fifth signals, and a ninth signal corresponding to a sampling over one bit of a sum between the fourth and fifth signals, wherein the second circuit is configured to receive the sixth, seventh, eighth, and ninth signals and determine, during a first phase where the first and second signals are representative of a first known symbol of a QPSK constellation, a state of a first bit from among a first state and a second state based on the eighth and ninth signals.
    Type: Application
    Filed: July 29, 2022
    Publication date: February 2, 2023
    Inventors: Eric Andre, Lionel Vogt
  • Patent number: 9030213
    Abstract: A method and system for measuring a time constant RC of an integrated electronic circuit is provided. This integrated circuit may be made up of a first hardware component and of a second hardware component wherein one of the hardware components is a resistive element and the other is a capacitive element. The first and the second hardware components are connected to an inverting input of an operational amplifier of an integrator of a delta-sigma modulator. A DC voltage is applied to the modulator input. The output signal Qs of the modulator is measured with the aid of an analog/digital converter, and the value of the time constant RC is determined on the basis of at least one measurement of the level of the DC component of the output signal Qs of the modulator carried out with the air of a measurement counter circuit.
    Type: Grant
    Filed: January 28, 2010
    Date of Patent: May 12, 2015
    Assignee: ST-Ericsson SA
    Inventor: Eric Andre
  • Patent number: 8797200
    Abstract: A delta-sigma analog-to-digital converter generates a digital signal as a function of an analog signal and a clock signal having a first phase and a second phase. The converter includes a first branch that applies an analog input signal, a feedback branch having a digital-to-analog converter that feeds back an analog reference signal, a loop filter, a quantizer, and a switch. The switch includes, and is timely correlated with, an output switch of the digital-to- analog converter. The switch functions to connect an input resistance on the first branch and disconnect the digital-to-analog converter during the first phase, and disconnects the input resistance and connects the digital-to-analog converter during the second phase.
    Type: Grant
    Filed: July 6, 2011
    Date of Patent: August 5, 2014
    Assignee: ST-Ericsson SA
    Inventors: Julien Goulier, Eric Andre
  • Patent number: 8610610
    Abstract: System and method for calibrating a time constant R0Ci of an integrated electronic current-feedback continuous-time delta sigma analog/digital converter (modulator) having a variable-impedance filter coupled to input of the modulator, an analog input signal Vin of fixed frequency applied to the variable-impedance filter, wherein the analog input signal Vin attenuation engendered by the variable-impedance filter is measured, and the value of a time constant R0Ci in the modulator and value of the impedance of the variable-impedance filter are modified until an attenuation corresponding to the desired attenuation for the integrated electronic circuit modulator is obtained.
    Type: Grant
    Filed: January 28, 2010
    Date of Patent: December 17, 2013
    Assignee: ST-Ericsson SA
    Inventors: Eric Andre, Sébastien Lefebvre, Jonathan Amiach
  • Publication number: 20130194117
    Abstract: The present invention relates to analog-to-digital converters and more particularly to a delta-sigma analog-to-digital converter 1 for generating a digital signal as a function of an analog signal and a clock signal having a first phase and a second phase, said converter comprises:—a first branch 11 for applying an analog input signal,—a feedback branch for feeding back an analog reference signal, with a digital-to-analog converter 121,—a loop filter 13,—a quantizer 15, and—a switch 16, the switch being arranged and timely correlated with an output switch of said digital-to-analog converter in order to connect the input resistance and disconnect the digital-to-analog converter during said first phase and to disconnect the input resistance and connect the digital-to-analog converter during said second phase. The present invention also relates to a method for operating the same.
    Type: Application
    Filed: July 6, 2011
    Publication date: August 1, 2013
    Applicant: ST-ERICSSON SA
    Inventors: Julien Goulier, Eric Andre
  • Publication number: 20120026024
    Abstract: System and method for calibrating a time constant R0Ci of an integrated electronic current-feedback continuous-time delta sigma analog/digital converter (modulator) having a variable-impedance filter coupled to the input of the modulator, an analog input signal Vin of fixed frequency applied to the variable-impedance filter, wherein the analog input signal Vin attenuation engendered by the variable-impedance filter is measured, and the value of a time constant R0Ci in the modulator and the value of the impedance of the variable-impedance filter are modified until an attenuation corresponding to the desired attenuation for the integrated electronic circuit modulator is obtained.
    Type: Application
    Filed: January 28, 2010
    Publication date: February 2, 2012
    Applicant: ST-ERICSSON SA
    Inventors: Eric Andre, Sébastien Lefebvre, Jonathan Amiach
  • Publication number: 20120025847
    Abstract: A method and system for measuring a time constant RC of an integrated electronic circuit is provided. This integrated circuit may be made up of a first hardware component and of a second hardware component wherein one of the hardware components is a resistive element and the other is a capacitive element. The first and the second hardware components are connected to an inverting input of an operational amplifier of an integrator of a delta-sigma modulator. A DC voltage is applied to the modulator input. The output signal Qs of the modulator is measured with the air of an analog/digital converter, and the value of the time constant RC is determined on the basis of at least one measurement of the level of the DC component of the output signal Qs of the modulator carried out with the air of a measurement counter circuit.
    Type: Application
    Filed: January 28, 2010
    Publication date: February 2, 2012
    Applicant: ST-ERICSSON SA
    Inventor: Eric Andre
  • Patent number: 7796964
    Abstract: A radio signal receiver includes an input for receiving an input signal having an input carrier frequency modulated by a payload signal to be detected. A frequency converter changes the carrier frequency of the input signal and produces an intermediate signal that is an image of the input signal, and has a carrier frequency equal to an intermediate frequency. A filter circuit filters the intermediate signal. A demodulator eliminates a component, with a frequency equal to the intermediate frequency, from the filtered intermediate frequency, and produces the payload signal. The receiver also includes a detection circuit to produce a level signal representative of a level of the payload signal. A control circuit applies a control signal representative of the level signal to a control input of the frequency converter, the filter circuit and the demodulator.
    Type: Grant
    Filed: April 13, 2007
    Date of Patent: September 14, 2010
    Assignee: STMicroelectronics S.A.
    Inventors: Bruno Pellat, Davy Thevenet, Eric Andre, Florent Sibille, Daniel Saias
  • Patent number: 7634247
    Abstract: A method for sampling an analogue radiofrequency signal comprising reception of the analogue radiofrequency signal, sending of the received signal on two analogue channels, each channel performing a first signal sampling operation, including a filtering step eliminating signal frequencies that could fold on the useful signal during sampling such that the sampled signal represents a filtered version of the received signal, wherein the sampling frequency is taken to be equal to the frequency of the signal carrier divided by a factor Ndiv1+½, Ndiv1 being an integer number, to bring the useful signal to half of the sampling frequency after sampling.
    Type: Grant
    Filed: March 15, 2005
    Date of Patent: December 15, 2009
    Assignee: STMicroelectronics S.A.
    Inventors: Loïc Joet, Daniel Saias, Eric Andre
  • Patent number: 7474241
    Abstract: An analog-digital delta-sigma converter includes a plurality of continuous time integrators for performing a delta-sigma modulation. Each integrator includes at least one charge sharing integrator at a modulator input. One or more pure integrators follow the charge sharing integrator.
    Type: Grant
    Filed: April 10, 2007
    Date of Patent: January 6, 2009
    Assignee: STMicroelectronics, SA
    Inventor: Eric Andre
  • Publication number: 20070249306
    Abstract: A radio signal receiver includes an input for receiving an input signal having an input carrier frequency modulated by a payload signal to be detected. A frequency converter changes the carrier frequency of the input signal and produce an intermediate signal that is an image of the input signal, and has a carrier frequency equal to an intermediate frequency. A filter circuit filters the intermediate signal. A demodulator eliminates a component, with a frequency equal to the intermediate frequency, from the filtered intermediate frequency, and produces the payload signal. The receiver also includes a detection circuit to produce a level signal representative of a level of the payload signal. a control circuit to apply a control signal representative of the level signal to a control input of the frequency converter, the filter circuit and the demodulator.
    Type: Application
    Filed: April 13, 2007
    Publication date: October 25, 2007
    Applicant: STMicroelectronics SA
    Inventors: Bruno Pellat, Davy Thevenet, Eric Andre, Florent Sibille, Daniel Saias
  • Publication number: 20070236375
    Abstract: An analog-digital delta-sigma converter includes a plurality of continuous time integrators for performing a delta-sigma modulation. Each integrator includes at least one charge sharing integrator at a modulator input. One or more pure integrators follow the charge sharing integrator.
    Type: Application
    Filed: April 10, 2007
    Publication date: October 11, 2007
    Applicant: STMicroelectronics SA
    Inventor: Eric Andre
  • Publication number: 20060240793
    Abstract: The invention relates to a dual mode radio frequency reception device of the type enabling the reception firstly of multi-carrier broadcast signals in a first frequency band and secondly radio positioning signals in a second frequency band, comprising a single preprocessing module (21), particularly including a pass-band antenna filter (211) in which the pass-band includes at least the said first and second frequency bands, and outputting firstly to a first processing system (22) to process the said multi-carrier broadcast signals, and secondly to a second processing system (23) to process the said radio positioning signals.
    Type: Application
    Filed: December 29, 2005
    Publication date: October 26, 2006
    Inventors: Eric Andre, Patrick Senn
  • Patent number: 6999716
    Abstract: The invention relates to a dual mode radio frequency reception device of the type enabling the reception firstly of multi-carrier broadcast signals in a first frequency band and secondly radio positioning signals in a second frequency band, comprising a single preprocessing module (21), particularly including a pass-band antenna filter (211) in which the pass-band includes at least the said first and second frequency bands, and outputting firstly to a first processing system (22) to process the said multi-carrier broadcast signals, and secondly to a second processing system (23) to process the said radio positioning signals.
    Type: Grant
    Filed: February 23, 2000
    Date of Patent: February 14, 2006
    Inventors: Eric Andre, Patrice Senn
  • Patent number: 6914458
    Abstract: A method for generating a signal with a frequency equal to a product of a reference frequency and a real number includes providing an output signal from an oscillator, and performing a first integer division of a frequency of the output signal by a first integer divider to obtain a first intermediate signal. A first measurement signal representative of a time difference between the first intermediate signal and a reference signal having the reference frequency is determined. The method further includes generating a first comparison signal derived from the first measurement signal, and generating a second comparison signal dependent on a period of the reference signal, on integer and decimal parts of the real number and on the first integer divider. The first and second comparison signals are compared to obtain an error signal representative of a time difference between a period of a current output signal and the period of the reference signal.
    Type: Grant
    Filed: October 17, 2003
    Date of Patent: July 5, 2005
    Assignee: STMicroelectronics SA
    Inventors: Loïc Joet, Sébastien Dedieu, Eric Andre, Daniel Saias
  • Publication number: 20040113665
    Abstract: A method for generating a signal with a frequency equal to a product of a reference frequency and a real number includes providing an output signal from an oscillator, and performing a first integer division of a frequency of the output signal by a first integer divider to obtain a first intermediate signal. A first measurement signal representative of a time difference between the first intermediate signal and a reference signal having the reference frequency is determined. The method further includes generating a first comparison signal derived from the first measurement signal, and generating a second comparison signal dependent on a period of the reference signal, on integer and decimal parts of the real number and on the first integer divider. The first and second comparison signals are compared to obtain an error signal representative of a time difference between a period of a current output signal and the period of the reference signal.
    Type: Application
    Filed: October 17, 2003
    Publication date: June 17, 2004
    Applicant: STMicroelectronics SA
    Inventors: Loic Joet, Sebastien Dedieu, Eric Andre, Daniel Saias
  • Patent number: RE42043
    Abstract: A radio frequency transmitter, of the type supplied with two signals in baseband and in quadrature, I(nT) and q(nT), which are images from two binary streams representing information to be transmitted, 1) provides a first transposition into the digital domain, at an intermediate frequency ?0, for the baseband signals and generates, by combination, two signals of intermediate frequency in quadrature, 2) provides a second transposition into the analog domain, after multiplication by a frequency ?1, followed by a summation of the two signals at intermediate frequency and in quadrature, in such a way that a resultant signal is generated which is found finally around a frequency ?2, where ?2=?0+?1. In an advantageous variant, the radio frequency transmitter additionally digitally compensates gain and phase imperfections of the direct conversion.
    Type: Grant
    Filed: December 23, 2005
    Date of Patent: January 18, 2011
    Inventor: Eric Andre