Patents by Inventor ERIC AUBANEL

ERIC AUBANEL has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10678482
    Abstract: Aspects provide multi-tier data synchronization based on a concurrent linked monitor list. A computer processor associates each of different data regions of a packed data object with different mutual exclusion monitor nodes of a linked list, the data regions defined by a data offset location within memory data and a length of the data region from the offset. In response to determining that a first data region of the packed data object is on-heap memory, the processor associates the first data region with a container representative of the linked list sorted in ascending order of the respective offset values, and a hash code of the container; and in response to determining that a second data region of the packed data object is off-heap memory, stores container information for the second data region in the linked list and resorts the linked-list nodes of container information in ascending order of offset values.
    Type: Grant
    Filed: July 24, 2018
    Date of Patent: June 9, 2020
    Assignee: International Business Machines Corporation
    Inventors: Oluwatobi A. Ajila, Eric Aubanel, Kenneth B. Kent, Angela Lin, Bing Yang
  • Publication number: 20180329641
    Abstract: Aspects provide multi-tier data synchronization based on a concurrent linked monitor list. A computer processor associates each of different data regions of a packed data object with different mutual exclusion monitor nodes of a linked list, the data regions defined by a data offset location within memory data and a length of the data region from the offset. In response to determining that a first data region of the packed data object is on-heap memory, the processor associates the first data region with a container representative of the linked list sorted in ascending order of the respective offset values, and a hash code of the container; and in response to determining that a second data region of the packed data object is off-heap memory, stores container information for the second data region in the linked list and resorts the linked-list nodes of container information in ascending order of offset values.
    Type: Application
    Filed: July 24, 2018
    Publication date: November 15, 2018
    Inventors: OLUWATOBI A. AJILA, Eric Aubanel, Kenneth B. Kent, Angela Lin, Bing Yang
  • Patent number: 10073646
    Abstract: Aspects provide multi-tier data synchronization based on a concurrent linked monitor list. A computer processor associates each of different data regions of a packed data object with different mutual exclusion monitor nodes of a linked list, the data regions defined by a data offset location within memory data and a length of the data region from the offset. In response to determining that a first data region of the packed data object is on-heap memory, the processor associates the first data region with a container representative of the linked list sorted in ascending order of the respective offset values, and a hash code of the container; and in response to determining that a second data region of the packed data object is off-heap memory, stores container information for the second data region in the linked list and resorts the linked-list nodes of container information in ascending order of offset values.
    Type: Grant
    Filed: January 31, 2017
    Date of Patent: September 11, 2018
    Assignee: International Business Machines Corporation
    Inventors: Oluwatobi A. Ajila, Eric Aubanel, Kenneth B. Kent, Angela Lin, Bing Yang
  • Publication number: 20180217776
    Abstract: Aspects provide multi-tier data synchronization based on a concurrent linked monitor list. A computer processor associates each of different data regions of a packed data object with different mutual exclusion monitor nodes of a linked list, the data regions defined by a data offset location within memory data and a length of the data region from the offset. In response to determining that a first data region of the packed data object is on-heap memory, the processor associates the first data region with a container representative of the linked list sorted in ascending order of the respective offset values, and a hash code of the container; and in response to determining that a second data region of the packed data object is off-heap memory, stores container information for the second data region in the linked list and resorts the linked-list nodes of container information in ascending order of offset values.
    Type: Application
    Filed: January 31, 2017
    Publication date: August 2, 2018
    Inventors: OLUWATOBI A. AJILA, ERIC AUBANEL, ANGELA LIN, KENNETH B. KENT, BING YANG