Abstract: A programmable temperature compensated voltage reference is disclosed. In an exemplary embodiment, an apparatus includes a digital-to-analog converter (DAC) that uses a reference voltage and a code to generate a DAC output voltage. The apparatus also includes a temperature compensator that uses a temperature measurement (T) and the DAC code to generate a temperature compensation signal. The temperature compensation signal is represented by a third order polynomial equation. The apparatus also includes a signal combiner that combines the DAC output voltage and the temperature compensation signal to generate a temperature compensated programmable reference voltage.

Abstract: A chopper stabilzed amplifier with synchronous switched capacitor noise filtering is disclosed. In an exemplary embodiment, an apparatus includes a chopper amplifier having an input that receives an input signal and an output that outputs an amplified signal. The chopper amplifier includes an input chopping circuit and an output chopping circuit, where the input and output chopping circuits operate in response to a chop clock. The apparatus also includes a switched capacitor filter having an input that receives the amplified signal and an output that outputs a filtered signal. The switched capacitor filter operates in response to a filter clock. The apparatus also includes a filter timing adjuster that receives a reference voltage and adjusts a phase of the filter clock with respect to the chop clock to reduce chopper noise on that reference voltage.

Abstract: A chopper stabilzed amplifier with synchronous switched capacitor noise filtering is disclosed. In an exemplary embodiment, an apparatus includes a chopper amplifier having an input that receives an input signal and an output that outputs an amplified signal. The chopper amplifier includes an input chopping circuit and an output chopping circuit, where the input and output chopping circuits operate in response to a chop clock. The apparatus also includes a switched capacitor filter having an input that receives the amplified signal and an output that outputs a filtered signal. The switched capacitor filter operates in response to a filter clock. The apparatus also includes a filter timing adjuster that receives a reference voltage and adjusts a phase of the filter clock with respect to the chop clock to reduce chopper noise on that reference voltage.

Abstract: A programmable temperature compensated voltage reference is disclosed. In an exemplary embodiment, an apparatus includes a digital-to-analog converter (DAC) that uses a reference voltage and a code to generate a DAC output voltage. The apparatus also includes a temperature compensator that uses a temperature measurement (T) and the DAC code to generate a temperature compensation signal. The temperature compensation signal is represented by a third order polynomial equation. The apparatus also includes a signal combiner that combines the DAC output voltage and the temperature compensation signal to generate a temperature compensated programmable reference voltage.

Abstract: A chopper stabilized amplifier with synchronous switched capacitor noise filtering is disclosed. In an exemplary embodiment, an apparatus includes a chopper amplifier having an input that receives an input signal and an output that outputs an amplified signal. The chopper amplifier includes an input chopping circuit and an output chopping circuit, where the input and output chopping circuits operate in response to a chop clock. The apparatus also includes a switched capacitor filter having an input that receives the amplified signal and an output that outputs a filtered signal. The switched capacitor filter operates in response to a filter clock. The apparatus also includes a filter timing adjuster that receives a reference voltage and adjusts a phase of the filter clock with respect to the chop clock to reduce chopper noise on that reference voltage.

Abstract: A programmable temperature compensated voltage reference is disclosed. In an exemplary embodiment, an apparatus includes a digital-to-analog converter (DAC) that uses a reference voltage and a code to generate a DAC output voltage. The apparatus also includes a temperature compensator that uses a temperature measurement (T) and the DAC code to generate a temperature compensation signal. The temperature compensation signal is represented by a third order polynomial equation. The apparatus also includes a signal combiner that combines the DAC output voltage and the temperature compensation signal to generate a temperature compensated programmable reference voltage.

Abstract: A programmable system includes an input/output (I/O) pin that is configurable into multiple operational states. The programmable system further includes a memory device to store configuration data that, when provided to the I/O pin, causes the I/O pin to reconfigure into one of the operational states. When power is supplied to the system, the memory device is configured to provide the configuration data to the I/O pin prior to a system microcontroller becoming operational responsive to the power.

Abstract: A variable reference voltage circuit for performing memory operation on non-volatile memory includes a multi-level voltage source and a selector circuit. The multi-level voltage source generates multiple voltages. The selector circuit includes a selector input and a selector output. The selector input is coupled to the multi-level voltage source to selectively couple any of the multiple voltages to the selector output. The selector output of the selector circuit is coupled to a non-volatile memory array to provide the NV memory array with a selectable program voltage for programming the NV memory array and a selectable erase voltage for erasing the NV memory array.

Abstract: A semi-passive radio frequency identification (RFID) tag being coupled to a battery providing a battery voltage for powering a part of the circuitry of the RFID tag includes an RF communication block receiving and transmitting RF signals, a sensor block including a frequency ratio digitizing temperature sensor for alternately measuring the ambient temperature and the battery voltage, and a control logic block in communication with the RF communication block and the sensor block. The control logic controls the operation of the RF communication block and the sensor block and stores temperature and voltage measurement data generated by the sensor block. In one embodiment, the control logic block of the RFID tag operates based on a system clock and the sensor block provides a reference clock to the control logic block for use in calibrating the system clock of the control logic block.

Abstract: A frequency ratio digitizing temperature sensor for generating a linearity-corrected temperature output signal includes an input generation circuit receiving a PTAT current and a CTAT current and a frequency ratio ADC including data and reference oscillators. The input generation circuit generates a first current from the weighted sum of the PTAT current and the CTAT current and also generates a first corrected current being the sum of the first current and a first portion of the PTAT current. The input generation circuit provides a first output current indicative of the PTAT current and a first output voltage generated by applying the first corrected current to a first resistor for use with the data oscillator and provides a second output current being the first corrected current and a second output voltage generated by applying the first current to a second resistor for use with the reference oscillator of the ADC.

Abstract: A tracheotomy tube apparatus includes an outer cannula having first and second ends, and a fenestration along the length of the outer cannula between the first and second ends. The apparatus further includes a first inner cannula sized for insertion into the outer cannula. The first inner cannula has a raised region substantially to close the fenestration when the first inner cannula is inserted into the outer cannula. The apparatus further comprises a second inner cannula for insertion into the outer cannula when the first inner cannula is removed therefrom. The second inner cannula includes a resilient region which lies adjacent the fenestration when the second inner cannula is properly oriented within the outer cannula, a valve at an end thereof and a region between the resilient region and the end thereof which provides a passageway between the second inner cannula and the outer cannula when the second inner cannula is properly oriented within the outer cannula.

Abstract: A method and circuit provide a system level reset function for an electronic device. An initial reset function is provided under a low voltage condition of supply voltage, such as occur upon first energizing the electronic device. A tunable reset function is also provided, which can first be asserted at a voltage level setting less precise than that setting becomes upon tuning. Further, a boot-up reset function is provided, which provides its reset function at a voltage level setting that is set according to a calibration. Calibration can be based on data stored in a non-volatile memory, and can involve a checksum operation. The electronic device, a microcontroller for instance, is held in a reset state with any of the initial, tunable, and boot-up reset functions.

Abstract: Insertion of a flange on a tubular prosthesis such as a voice prosthesis through a body opening such as a tracheoesophageal fistula is facilitated by forming a thinner section on the flange that preferentially folds as the flange passes through the fistula. Retention of the flange in a gel cap is improved by forming a foldable flap extension on a cylindrical flange. A tubular tool for insertion of a tubular voice prosthesis through a fistula is also disclosed.