Patents by Inventor Eric Brion Acquitan

Eric Brion Acquitan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Molded semiconductor package with high voltage isolation
    Patent number: 11817407
    Abstract: A molded semiconductor package includes: a semiconductor die attached to a substrate, the semiconductor die having a bond pad at a first side of the semiconductor die which faces away from the substrate and an insulating layer covering the first side; an electrical conductor attached to a part of the bond pad exposed by an opening in the insulating layer; a mold compound encasing the semiconductor die; and an electrically insulative material filling the opening in the insulating layer and sealing the part of the bond pad exposed by the opening in the insulating layer. The electrically insulative material separates the mold compound from the part of the bond pad exposed by the opening in the insulating layer. A corresponding method of producing the molded semiconductor package also is described.
    Type: Grant
    Filed: May 17, 2022
    Date of Patent: November 14, 2023
    Assignee: Infineon Technologies AG
    Inventors: Shao Ping Wan, Eric Brion Acquitan, Dexter Reynoso, Jürgen Schredl, Woon Yik Yong
  • MOLDED SEMICONDUCTOR PACKAGE WITH HIGH VOLTAGE ISOLATION
    Publication number: 20220278060
    Abstract: A molded semiconductor package includes: a semiconductor die attached to a substrate, the semiconductor die having a bond pad at a first side of the semiconductor die which faces away from the substrate and an insulating layer covering the first side; an electrical conductor attached to a part of the bond pad exposed by an opening in the insulating layer; a mold compound encasing the semiconductor die; and an electrically insulative material filling the opening in the insulating layer and sealing the part of the bond pad exposed by the opening in the insulating layer. The electrically insulative material separates the mold compound from the part of the bond pad exposed by the opening in the insulating layer. A corresponding method of producing the molded semiconductor package also is described.
    Type: Application
    Filed: May 17, 2022
    Publication date: September 1, 2022
    Inventors: Shao Ping Wan, Eric Brion Acquitan, Dexter Reynoso, Jürgen Schredl, Woon Yik Yong
  • MOLDED SEMICONDUCTOR PACKAGE WITH HIGH VOLTAGE ISOLATION
    Publication number: 20220181280
    Abstract: A molded semiconductor package includes: a semiconductor die attached to a substrate, the semiconductor die having a bond pad at a first side of the semiconductor die which faces away from the substrate and an insulating layer covering the first side; an electrical conductor attached to a part of the bond pad exposed by an opening in the insulating layer; a mold compound encasing the semiconductor die; and an electrically insulative material filling the opening in the insulating layer and sealing the part of the bond pad exposed by the opening in the insulating layer. The electrically insulative material separates the mold compound from the part of the bond pad exposed by the opening in the insulating layer. A breakdown voltage of the electrically insulative material is greater than a breakdown voltage of the mold compound.
    Type: Application
    Filed: December 7, 2020
    Publication date: June 9, 2022
    Inventors: Shao Ping Wan, Eric Brion Acquitan, Dexter Reynoso, Jürgen Schredl, Woon Yik Yong
  • Molded semiconductor package with high voltage isolation
    Patent number: 11355460
    Abstract: A molded semiconductor package includes: a semiconductor die attached to a substrate, the semiconductor die having a bond pad at a first side of the semiconductor die which faces away from the substrate and an insulating layer covering the first side; an electrical conductor attached to a part of the bond pad exposed by an opening in the insulating layer; a mold compound encasing the semiconductor die; and an electrically insulative material filling the opening in the insulating layer and sealing the part of the bond pad exposed by the opening in the insulating layer. The electrically insulative material separates the mold compound from the part of the bond pad exposed by the opening in the insulating layer. A breakdown voltage of the electrically insulative material is greater than a breakdown voltage of the mold compound.
    Type: Grant
    Filed: December 7, 2020
    Date of Patent: June 7, 2022
    Assignee: Infineon Technologies AG
    Inventors: Shao Ping Wan, Eric Brion Acquitan, Dexter Reynoso, Jürgen Schredl, Woon Yik Yong