Abstract: A method for manufacturing a structure comprising a thin layer transferred onto a support provided with a charge trapping layer, the method comprising the following steps: —preparing the support comprising forming the trapping layer on a base substrate, the trapping layer having a hydrogen concentration of less than 10{circumflex over (?)}18 at/cm{circumflex over (?)}; —joining the support to a donor substrate by way of a dielectric layer having a hydrogen concentration of less than 10{circumflex over (?)}20 at/cm{circumflex over (?)}3 or comprising a barrier preventing the diffusion of hydrogen toward the trapping layer or having low hydrogen diffusivity; —removing part of the donor substrate to form the thin layer; the manufacturing method exposing the structure to a temperature below a maximum temperature of 1000° C. The present disclosure also relates to a structure obtained at the end of this method.

Abstract: A method for correcting the thickness of a piezoelectric layer arranged on a piezoelectric-on-insulator substrate comprises: measuring the thickness of at least one intermediate layer located between the piezoelectric layer and a carrier substrate; measuring the thickness of the piezoelectric layer; based on the measurements of the thickness of the at least one intermediate layer and of the piezoelectric layer and on a numerical model of at least one property of the piezoelectric layer as a function of a plurality of pairs of thicknesses of the piezoelectric layer and of the at least one intermediate layer, computing a thickness correction for the piezoelectric layer with a view to obtaining a target value for each property; and applying the thickness correction to the piezoelectric layer using a milling process in a topographically discriminating manner.

Abstract: The disclosure relates to a hybrid structure for a surface-acoustic-wave device comprising a useful layer of piezoelectric material joined to a carrier substrate having a thermal expansion coefficient lower than that of the useful layer; the hybrid structure comprising an intermediate layer located between the useful layer and the carrier substrate, the intermediate layer being a structured layer formed from at least two different materials comprising a plurality of periodic motifs in the plane of the intermediate layer.

Abstract: The disclosure relates to a hybrid structure for a surface-acoustic-wave device comprising a useful layer of piezoelectric material joined to a carrier substrate having a thermal expansion coefficient lower than that of the useful layer; the hybrid structure comprising an intermediate layer located between the useful layer and the carrier substrate, the intermediate layer being a structured layer formed from at least two different materials comprising a plurality of periodic motifs in the plane of the intermediate layer.

Abstract: A method of manufacturing a piezoelectric structure comprises providing a substrate of piezoelectric material, providing a carrier substrate, depositing a dielectric bonding layer at a temperature lower than or equal to 300° C. on a single side of the substrate of piezoelectric material, a step of joining the substrate of piezoelectric material to the carrier substrate via the dielectric bonding layer, a thinning step for forming the piezoelectric structure, which comprises a layer of piezoelectric material joined to a carrier substrate.

Abstract: A method for manufacturing a structure comprising a thin layer transferred onto a support provided with a charge trapping layer, the method comprising the following steps: —preparing the support comprising forming the trapping layer on a base substrate, the trapping layer having a hydrogen concentration of less than 10{circumflex over (?)}18 at/cm{circumflex over (?)}; —joining the support to a donor substrate by way of a dielectric layer having a hydrogen concentration of less than 10{circumflex over (?)}20 at/cm{circumflex over (?)}3 or comprising a barrier preventing the diffusion of hydrogen toward the trapping layer or having low hydrogen diffusivity; —removing part of the donor substrate to form the thin layer; the manufacturing method exposing the structure to a temperature below a maximum temperature of 1000° C. The present disclosure also relates to a structure obtained at the end of this method.

Abstract: The disclosure relates to a hybrid structure for a surface-acoustic-wave device comprising a useful layer of piezoelectric material joined to a carrier substrate having a thermal expansion coefficient lower than that of the useful layer; the hybrid structure comprising an intermediate layer located between the useful layer and the carrier substrate, the intermediate layer being a structured layer formed from at least two different materials comprising a plurality of periodic motifs in the plane of the intermediate layer.

Abstract: The disclosure relates to a hybrid structure for a surface-acoustic-wave device comprising a useful layer of piezoelectric material joined to a carrier substrate having a thermal expansion coefficient lower than that of the useful layer; the hybrid structure comprising an intermediate layer located between the useful layer and the carrier substrate, the intermediate layer being a structured layer formed from at least two different materials comprising a plurality of periodic motifs in the plane of the intermediate layer.

Abstract: The disclosure relates to a hybrid structure for a surface-acoustic-wave device comprising a useful layer of piezoelectric material joined to a carrier substrate having a thermal expansion coefficient lower than that of the useful layer; the hybrid structure comprising an intermediate layer located between the useful layer and the carrier substrate, the intermediate layer being a structured layer formed from at least two different materials comprising a plurality of periodic motifs in the plane of the intermediate layer.

Abstract: The invention relates to a process for manufacturing a semiconductor substrate, characterized in that it comprises providing at least one donor semiconductor substrate comprising at least one useful silicon layer; inspecting the donor substrate via an inspecting machine in order to detect whether the useful layer contains emerging cavities of a size larger than or equal to a critical size, said critical size being strictly smaller than 44 nm; and manufacturing a semiconductor substrate comprising at least part of the useful layer of the donor substrate if, considering cavities of a size larger than or equal to the critical size, the density or number of cavities in the useful layer of the donor substrate is lower than or equal to a critical defect density or number.

Abstract: The invention relates to a process for manufacturing a semiconductor substrate, characterized in that it comprises providing at least one donor semiconductor substrate comprising at least one useful silicon layer; inspecting the donor substrate via an inspecting machine in order to detect whether the useful layer contains emerging cavities of a size larger than or equal to a critical size, said critical size being strictly smaller than 44 nm; and manufacturing a semiconductor substrate comprising at least part of the useful layer of the donor substrate if, considering cavities of a size larger than or equal to the critical size, the density or number of cavities in the useful layer of the donor substrate is lower than or equal to a critical defect density or number.