Patents by Inventor Eric C. E. Van Grunsven

Eric C. E. Van Grunsven has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8138087
    Abstract: An integrated circuit is provided that comprises a substrate of silicon and an interconnect in a through-hole extending from the first to the second side of the substrate. The interconnect is coupled to a metallization layer on the first side of the substrate and is provided on an amorphous silicon layer that is present at a side wall of the through-hole, and particularly at an edge thereof adjacent to the first side of the substrate. The interconnect comprises a metal stack of nickel and silver. A preferred way of forming the amorphous silicon layer is a sputter etching technique.
    Type: Grant
    Filed: September 17, 2007
    Date of Patent: March 20, 2012
    Assignee: NXP B.V.
    Inventors: Stephane Morel, Arnoldus Den Dekker, Elisabeth C. Rodenburg, Eric C. E. Van Grunsven
  • Publication number: 20090279575
    Abstract: A carrier substrate (100) with laser sources includes a transparent center substrate (20), an upper substrate (30) adhered to the center substrate having openings (40) formed therein to expose the center substrate on a first side, and a lower substrate (32) adhered to the center substrate on a second side opposite the first side and having openings (42) formed therein to expose the center substrate on the second side, the openings on the lower substrate corresponding to positions of the openings in the upper substrate. Frequency conversion elements (60) are disposed on the center substrate within the openings of the lower substrate. Laser dies (70) are aligned to the frequency conversion elements and coupled to the lower substrate to provide light though the frequency conversion elements and the center substrate during operation. Methods for fabrication are also disclosed.
    Type: Application
    Filed: December 13, 2006
    Publication date: November 12, 2009
    Applicant: Koninklijke Philips Electronics, N.V.
    Inventors: Eric C.E. van Grunsven, Willem Hoving, Anton P.M. van Arendonk, Johannes W. Weekamp, Olaf T.J. Vermeulen, Marc A. de Samber
  • Publication number: 20090267232
    Abstract: An integrated circuit (100) is provided that comprises a substrate (140) of silicon and an interconnect (130) in a through-hole extending from the first to the second side of the substrate. The interconnect is coupled to a metallisation layer (120) on the first side of the substrate and is provided on an amorphous silicon layer that is present at a side wall of the through-hole, and particularly at an edge thereof adjacent to the first side of the substrate. The interconnect comprises a metal stack of nickel and silver. A preferred way of forming the amorphous silicon layer is a sputter etching technique.
    Type: Application
    Filed: September 17, 2007
    Publication date: October 29, 2009
    Applicant: NXP, B.V.
    Inventors: Stephane Morel, Arnoldus Den Dekker, Elisabeth C. Rodenburg, Eric C. E. Van Grunsven