Patents by Inventor Eric C. Eichman

Eric C. Eichman has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5714416
    Abstract: A semiconductor device used as a semiconductor memory device is disclosed which is made of an amorphous silicon material that provides either a "1" or "0" memory state when the amorphous silicon material is in a non-conduction or insulating state and a "0" or "1" memory state when the amorphous silicon material is transformed, by use of a breakdown voltage applied to electrodes coupled thereto, into a conducting state. The amorphous silicon material is located adjacent to a doped semiconductor region of a semiconductor substrate separated only by a relatively thin primarily metal ohmic contact. The resulting semiconductor structure for the semiconductor device or semiconductor memory device is primarily a single level metalization type structure. A write-once, read-only semiconductor memory array is also disclosed which uses, as each memory cell of the array, one of the disclosed semiconductor memory devices.
    Type: Grant
    Filed: April 28, 1995
    Date of Patent: February 3, 1998
    Assignee: Microchip Technology Incorporated
    Inventors: Eric C. Eichman, Thomas C. Salt
  • Patent number: 5457649
    Abstract: A semiconductor device used as a semiconductor memory device is disclosed which is made of an amorphous silicon material that provides either a "1" or "0" memory state when the amorphous silicon material is in a non-conduction or insulating state and a "0" or "1" memory state when the amorphous silicon material is transformed, by use of a breakdown voltage applied to electrodes coupled thereto, into a conducting state. The amorphous silicon material is located adjacent to a doped semiconductor region of a semiconductor substrate separated only by a relatively thin primarily metal ohmic contact. The resulting semiconductor structure for the semiconductor device or semiconductor memory device is primarily a single level metalization type structure. A write-once, read-only semiconductor memory array is also disclosed which uses, as each memory cell of the array, one of the disclosed semiconductor memory devices.
    Type: Grant
    Filed: August 26, 1994
    Date of Patent: October 10, 1995
    Assignee: Microchip Technology, Inc.
    Inventors: Eric C. Eichman, Thomas C. Salt
  • Patent number: 5348587
    Abstract: A cold wall CVD reactor, particularly one for use in depositing TiN in a TiCl.sub.4 +NH.sub.3 reaction, is provided with a metallic liner insert in partially thermally insulated from the reactor wall which serves as one plasma electrode to form a weak secondary plasma when energized along with a second electrode near the vacuum exhaust port of the reactor. The plasma, in cooperation with radiant lamps provided to heat a wafer substrate onto which the primary CVD film is to be applied, heats the liner and a portion of the space adjacent the reactor walls and susceptor surfaces downstream of the reaction volume to cause the formation of deposits to be of the nature that can be removed by plasma cleaning without opening the reactor volume. Deposits such as TiN.sub.x Cl.sub.y and TiN form at temperatures of approximately 200.degree. C. to 650.degree. C., preferably between 300.degree. C. and 450.degree. C., rather than adduct ammonia salts of TiCl.sub.4, which would tend to form at temperatures of 200.degree. C.
    Type: Grant
    Filed: October 7, 1993
    Date of Patent: September 20, 1994
    Assignee: Materials Research Corporation
    Inventors: Eric C. Eichman, Bruce A. Sommer, Michael J. Churley, W. Chuck Ramsey
  • Patent number: 5308655
    Abstract: A process for forming low resistivity titanium nitride films on a silicon substrate by chemical vapor deposition includes a post-deposition ammonia anneal to provide hydrogen atoms which chemically react with chlorine atoms entrained within the titanium nitride film. The titanium nitride film is deposited by placing the silicon substrate in a reaction chamber, heating the silicon substrate within the reaction chamber, initially passing both TiCl.sub.4 gas and NH.sub.3 gas into the reaction chamber over the silicon substrate to deposit titanium nitride upon a surface of the silicon substrate, and thereafter discontinuing the flow of TiCl.sub.4 gas while continuing to pass NH.sub.3 gas into the reaction chamber over the silicon substrate to react with and remove residual chlorine atoms retained by the deposited titanium nitride film.
    Type: Grant
    Filed: February 10, 1992
    Date of Patent: May 3, 1994
    Assignee: Materials Research Corporation
    Inventors: Eric C. Eichman, Bruce A. Sommer, Michael J. Churley
  • Patent number: 5279857
    Abstract: A process for forming low resistivity titanium nitride films on a silicon substrate by chemical vapor deposition includes a post-deposition ammonia anneal to provide hydrogen atoms which chemically react with chlorine atoms entrained within the titanium nitride film. The titanium nitride film is deposited by placing the silicon substrate in a reaction chamber, heating the silicon substrate within the reaction chamber, initially passing both TiCl.sub.4 gas and NH.sub.3 gas into the reaction chamber over the silicon substrate to deposit titanium nitride upon a surface of the silicon substrate, and thereafter discontinuing the flow of TiCl.sub.4 gas while continuing to pass NH.sub.3 gas into the reaction chamber over the silicon substrate to react with and remove residual chlorine atoms retained by the deposited titanium nitride film.
    Type: Grant
    Filed: August 16, 1991
    Date of Patent: January 18, 1994
    Assignee: Materials Research Corporation
    Inventors: Eric C. Eichman, Bruce A. Sommer, Michael J. Churley
  • Patent number: 5271963
    Abstract: A cold wall CVD reactor, particularly one for use in depositing TiN in a TiCl.sub.4 +NH.sub.3 reaction, is provided with a metallic liner insert in partially thermally insulated from the reactor wall which serves as one plasma electrode to form a weak secondary plasma when energized along with a second electrode near the vacuum exhaust port of the reactor. The plasma, in cooperation with radiant lamps provided to heat a wafer substrate onto which the primary CVD film is to be applied, heats the liner and a portion of the space adjacent the reactor walls and susceptor surfaces downstream of the reaction volume to cause the formation of deposits to be of the nature that can be removed by plasma cleaning without opening the reactor volume. Deposits such as TiN.sub.x Cl.sub.y and TiN form at temperatures of approximately 200.degree. C. to 650.degree. C., preferably between 300.degree. C. and 450.degree. C., rather than adduct ammonia salts of TiCl.sub.4, which would tend to form at temperatures of 200.degree. C.
    Type: Grant
    Filed: November 16, 1992
    Date of Patent: December 21, 1993
    Assignee: Materials Research Corporation
    Inventors: Eric C. Eichman, Bruce A. Sommer, Michael J. Churley, W. Chuck Ramsey