Patents by Inventor Eric C Gantner

Eric C Gantner has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200170113
    Abstract: A flexible electronic interconnect comprises a first dielectric layer including a first surface and second surface opposite the first surface; a plurality of conductors disposed on the first surface of the first dielectric layer and arranged spaced apart from each other using a conductor spacing; and a first plurality of conductive shields disposed on the second surface of the first dielectric layer and arranged spaced apart from each other using a conductive shield spacing. The first plurality of conductive shields is arranged opposite the plurality of conductors and the conductive shield spacing is arranged opposite the conductor spacing.
    Type: Application
    Filed: October 24, 2019
    Publication date: May 28, 2020
    Inventors: Chaitanya Sreerama, Bok Eng Cheah, Jackson Chung Peng Kong, Yew San Lim, Stephen Harvey Hall, Eric C. Gantner
  • Patent number: 10354957
    Abstract: An electrical interconnect for an electronic package. The electrical interconnect includes a first dielectric layer; a second dielectric layer; a signal conductor positioned between the first dielectric layer and the second dielectric layer; and a conductive reference layer mounted on the first dielectric layer, and wherein the conductive reference layer does not cover the signal conductor. The conductive reference layer may be a first conductive reference layer and the electrical interconnect further comprises a second conductive reference layer mounted on the second dielectric layer. The second conductive reference layer does not cover the signal conductor. In addition, the signal conductor may be a first signal conductor and the electrical interconnect may further include a second signal conductor between the first dielectric layer and the second dielectric layer. The first and second signal conductors may form a differential pair of conductors.
    Type: Grant
    Filed: November 25, 2015
    Date of Patent: July 16, 2019
    Assignee: Intel Corporation
    Inventors: Bok Eng Cheah, Jackson Chung Peng Kong, Stephen Harvey Hall, Khang Choong Yong, Kooi Chi Ooi, Eric C Gantner
  • Publication number: 20180350748
    Abstract: An electrical interconnect for an electronic package. The electrical interconnect includes a first dielectric layer; a second dielectric layer; a signal conductor positioned between the first dielectric layer and the second dielectric layer; and a conductive reference layer mounted on the first dielectric layer, and wherein the conductive reference layer does not cover the signal conductor. The conductive reference layer may be a first conductive reference layer and the electrical interconnect further comprises a second conductive reference layer mounted on the second dielectric layer. The second conductive reference layer does not cover the signal conductor. In addition, the signal conductor may be a first signal conductor and the electrical interconnect may further include a second signal conductor between the first dielectric layer and the second dielectric layer. The first and second signal conductors may form a differential pair of conductors.
    Type: Application
    Filed: November 25, 2015
    Publication date: December 6, 2018
    Inventors: Bok Eng Cheah, Jackson Chung Peng Kong, Stephen Harvey Hall, Khang Choong Yong, Kooi Chi Ooi, Eric C Gantner