Abstract: Methods of increasing an energy density of an energy storage device involve increasing the capacitance of the energy storage device by depositing a material into a porous structure of the energy storage device using an atomic layer deposition process, by performing a procedure designed to increase a distance to which an electrolyte penetrates within channels of the porous structure, or by placing a dielectric material into the porous structure. Another method involves annealing the energy storage device in order to cause an electrically conductive substance to diffuse to a surface of the structure and form an electrically conductive layer thereon. Another method of increasing energy density involves increasing the breakdown voltage and another method involves forming a pseudocapacitor. A method of increasing an achievable power output of an energy storage device involves depositing an electrically conductive material into the porous structure.

Abstract: Methods of increasing an energy density of an energy storage device involve increasing the capacitance of the energy storage device by depositing a material into a porous structure of the energy storage device using an atomic layer deposition process, by performing a procedure designed to increase a distance to which an electrolyte penetrates within channels of the porous structure, or by placing a dielectric material into the porous structure. Another method involves annealing the energy storage device in order to cause an electrically conductive substance to diffuse to a surface of the structure and form an electrically conductive layer thereon. Another method of increasing energy density involves increasing the breakdown voltage and another method involves forming a pseudocapacitor. A method of increasing an achievable power output of an energy storage device involves depositing an electrically conductive material into the porous structure.

Abstract: Methods of forming microelectronic structures are described. Embodiments of those methods may include forming an electrochemical capacitor device by forming pores in low-purity silicon materials. Various embodiments described herein enable the fabrication of high capacitive devices using low cost techniques.

Abstract: In one embodiment of the invention, a method of forming an energy storage device is described in which a porous structure of an electrically conductive substrate is measured in-situ while being electrochemically etched in an electrochemical etching bath until a predetermined value is obtained, at which point the electrically conductive substrate may be removed from the electrochemical etching bath. In another embodiment, a method of forming an energy storage device is described in which an electrically conductive porous structure is measured to determine the energy storage capacity of the electrically conductive porous structure. The energy storage capacity of the electrically conductive porous structure is then reduced until a predetermined energy storage capacity value is obtained.

Abstract: Described is a chip comprising: a substrate; a logic unit forming an active circuit on the substrate; and a cosmic ray detector embedded in the substrate, the cosmic ray detector to detect a cosmic ray and to generate a signal indicating detection of the cosmic ray, the signal for reducing error in the logic unit.

Abstract: In one embodiment of the invention, a method of forming an energy storage device is described in which a porous structure of an electrically conductive substrate is measured in-situ while being electrochemically etched in an electrochemical etching bath until a predetermined value is obtained, at which point the electrically conductive substrate may be removed from the electrochemical etching bath. In another embodiment, a method of forming an energy storage device is described in which an electrically conductive porous structure is measured to determine the energy storage capacity of the electrically conductive porous structure. The energy storage capacity of the electrically conductive porous structure is then reduced until a predetermined energy storage capacity value is obtained.

Abstract: In one embodiment a charge storage device includes first (110) and second (120) electrically conductive structures separated from each other by a separator (130). At least one of the first and second electrically conductive structures includes a porous structure containing multiple channels (111, 121). Each one of the channels has an opening (112, 122) to a surface (115, 125) of the porous structure. In another embodiment the charge storage device includes multiple nanostructures (610) and an electrolyte (650) in physical contact with at least some of the nanostructures. A material (615) having a dielectric constant of at least 3.9 may be located between the electrolyte and the nanostructures.

Abstract: An energy storage structure includes an energy storage device containing at least one porous structure (110, 120, 510, 1010) that contains multiple channels (111, 121), each one of which has an opening (112, 122) to a surface (115, 116, 515, 516, 1015, 1116) of the porous structure, and further includes a support structure (102, 402, 502, 1002) for the energy storage device. In a particular embodiment, the porous structure and the support structure are both formed from a first material, and the support structure physically contacts a first portion (513, 813, 1213) of the energy storage device and exposes a second portion (514, 814, 1214) of the energy storage device.

Abstract: In one embodiment, a structure for a energy storage device may include at one polycrystalline substrate. The grain size may be designed to be at least a size at which phonon scattering begins to dominate over grain boundary scattering in the polycrystalline substrate. The structure also includes a porous structure containing multiple channels within the polycrystalline substrate.

Abstract: In one embodiment a charge storage device includes first (110) and second (120) electrically conductive structures separated from each other by a separator (130). At least one of the first and second electrically conductive structures includes a porous structure containing multiple channels (111, 121). Each one of the channels has an opening (112, 122) to a surface (115, 125) of the porous structure. In another embodiment the charge storage device includes multiple nanostructures (610) and an electrolyte (650) in physical contact with at least some of the nanostructures. A material (615) having a dielectric constant of at least 3.9 may be located between the electrolyte and the nanostructures.

Abstract: In one embodiment of the invention, a method of forming an energy storage device is described in which a porous structure of an electrically conductive substrate is measured in-situ while being electrochemically etched in an electrochemical etching bath until a predetermined value is obtained, at which point the electrically conductive substrate may be removed from the electrochemical etching bath. In another embodiment, a method of forming an energy storage device is described in which an electrically conductive porous structure is measured to determine the energy storage capacity of the electrically conductive porous structure. The energy storage capacity of the electrically conductive porous structure is then reduced until a predetermined energy storage capacity value is obtained.

Abstract: Described is a chip comprising: a substrate; a logic unit forming an active circuit on the substrate; and a cosmic ray detector embedded in the substrate, the cosmic ray detector to detect a cosmic ray and to generate a signal indicating detection of the cosmic ray, the signal for reducing error in the logic unit.

Abstract: In one embodiment, a structure for a energy storage device may include at one polycrystalline substrate. The grain size may be designed to be at least a size at which phonon scattering begins to dominate over grain boundary scattering in the polycrystalline substrate. The structure also includes a porous structure containing multiple channels within the polycrystalline substrate.

Abstract: Described is a chip comprising: a substrate; a logic unit forming an active circuit on the substrate; and a cosmic ray detector embedded in the substrate, the cosmic ray detector to detect a cosmic ray and to generate a signal indicating detection of the cosmic ray, the signal for reducing error in the logic unit.

Abstract: In one embodiment a charge storage device includes first (110) and second (120) electrically conductive structures separated from each other by a separator (130). At least one of the first and second electrically conductive structures includes a porous structure containing multiple channels (111, 121). Each one of the channels has an opening (112, 122) to a surface (115, 125) of the porous structure. In another embodiment the charge storage device includes multiple nanostructures (610) and an electrolyte (650) in physical contact with at least some of the nanostructures. A material (615) having a dielectric constant of at least 3.9 may be located between the electrolyte and the nanostructures.

Abstract: In one embodiment, a structure for a energy storage device may include at one polycrystalline substrate. The grain size may be designed to be at least a size at which phonon scattering begins to dominate over grain boundary scattering in the polycrystalline substrate. The structure also includes a porous structure containing multiple channels within the polycrystalline substrate.

Abstract: In one embodiment a charge storage device includes first (110) and second (120) electrically conductive structures separated from each other by a separator (130). At least one of the first and second electrically conductive structures includes a porous structure containing multiple channels (111, 121). Each one of the channels has an opening (112, 122) to a surface (115, 125) of the porous structure. In another embodiment the charge storage device includes multiple nanostructures (610) and an electrolyte (650) in physical contact with at least some of the nanostructures. A material (615) having a dielectric constant of at least 3.9 may be located between the electrolyte and the nanostructures.

Abstract: Methods of forming microelectronic structures are described. Embodiments of those methods may include forming an electrochemical capacitor device by forming pores in low-purity silicon materials. Various embodiments described herein enable the fabrication of high capacitive devices using low cost techniques.

Abstract: An apparatus and method for protecting a content item such as a digitally encoded movie, an electronic programming guide, or the like, by reordering blocks of the content item prior to transmitting it to a receiving device. The receiving device constructs a block reordering structure which is used to access the reordered content item, to facilitate retrieval of a desired block from the original content item. The reordering may be done responsive to an identifier value of the receiving device, such as a serial number.

Abstract: Described is a chip comprising: a substrate; a logic unit forming an active circuit on the substrate; and a cosmic ray detector embedded in the substrate, the cosmic ray detector to detect a cosmic ray and to generate a signal indicating detection of the cosmic ray, the signal for reducing error in the logic unit.