Patents by Inventor Eric C. Lett

Eric C. Lett has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7146643
    Abstract: Signatures of character strings in a document which may indicate a possible intrusion into or attack on a networked computer system or node thereof or other security breach are detected at high speed using a hardware accelerator within the environment of a hardware parser accelerator. An interrupt or exception can thus be issued to a host CPU before a command which may constitute such a security breach, intrusion or attack can be made executable by parsing of a document. The CPU can initiate network control measures to prevent or limit the intrusion.
    Type: Grant
    Filed: December 31, 2002
    Date of Patent: December 5, 2006
    Assignee: Lockheed Martin Corporation
    Inventors: Michael C. Dapp, Eric C. Lett
  • Patent number: 7080094
    Abstract: A hardware accelerated validation parser is provided to remove a large portion if not all of the processing and overhead burden of validation parsing from a host processor by parallel access to both a state table and a data dictionary based on a token and merging and selective redirection of the respective outputs thereof; a portion of a transition control word (TCW) formed by the merged data being used to advance through the state table and a portion of the TCW being used to control formation of a tree structured data object (TSDO) corresponding to a text document in a language such as XML™ which supports interoperability and platform independence. A stack is provided to accommodate nesting of elements and aggregate elements. The formation of the TSDO can be and preferably is performed asynchronously and autonomously in parallel with the validation parsing.
    Type: Grant
    Filed: December 31, 2002
    Date of Patent: July 18, 2006
    Assignee: Lockheed Martin Corporation
    Inventors: Michael C. Dapp, Eric C. Lett, Sai Lun Ng
  • Publication number: 20040083221
    Abstract: A hardware accelerated validation parser is provided to remove a large portion if not all of the processing and overhead burden of validation parsing from a host processor by parallel access to both a state table and a data dictionary based on a token and merging and selective redirection of the respective outputs thereof; a portion of a transition control word (TCW) formed by the merged data being used to advance through the state table and a portion of the TCW being used to control formation of a tree structured data object (TSDO) corresponding to a text document in a language such as XML™ which supports interoperability and platform independence. A stack is provided to accommodate nesting of elements and aggregate elements. The formation of the TSDO can be and preferably is performed asynchronously and autonomously in parallel with the validation parsing.
    Type: Application
    Filed: December 31, 2002
    Publication date: April 29, 2004
    Inventors: Michael C. Dapp, Eric C. Lett, Sai Lun Ng
  • Publication number: 20040083466
    Abstract: Dedicated hardware is employed to perform parsing of documents such as XML™ documents in much reduced time while removing a substantial processing burden from the host CPU. The conventional use of a state table is divided into a character palette, a state table in abbreviated form, and a next state palette. The palettes may be implemented in dedicated high speed memory and a cache arrangement may be used to accelerate accesses to the abbreviated state table. Processing is performed in parallel pipelines which may be partially concurrent. dedicated registers may be updated in parallel as well and strings of special characters of arbitrary length accommodated by a character palette skip feature under control of a flag bit to further accelerate parsing of a document.
    Type: Application
    Filed: December 31, 2002
    Publication date: April 29, 2004
    Inventors: Michael C. Dapp, Eric C. Lett
  • Publication number: 20040083387
    Abstract: Signatures of character strings in a document which may indicate a possible intrusion into or attack on a networked computer system or node thereof or other security breach are detected at high speed using a hardware accelerator within the environment of a hardware parser accelerator. An interrupt or exception can thus be issued to a host CPU before a command which may constitute such a security breach, intrusion or attack can be made executable by parsing of a document. The CPU can initiate network control measures to prevent or limit the intrusion.
    Type: Application
    Filed: December 31, 2002
    Publication date: April 29, 2004
    Inventors: Michael C. Dapp, Eric C. Lett