Abstract: A pixel includes five transistors, a photodetector and a storage node. A first transistor is coupled between the photodetector and the storage node. A second transistor includes a second transistor source and a second transistor drain. The second transistor source is coupled to the storage node. The second transistor drain is coupled to an output drain voltage. A third transistor includes a third transistor drain. The third transistor is coupled between the photodetector and a pixel reset voltage. The third transistor drain is coupled to the pixel reset voltage. The pixel reset voltage is different than the output drain voltage.

Abstract: A method of sensing radiation in a pixel includes applying a transfer clock signal, applying a pixel reset clock signal, and applying a pixel reset voltage. The applying a transfer clock signal applies the transfer clock signal to a gate electrode of a transfer gate transistor. The applying a pixel reset clock signal applies the pixel reset clock signal to a gate electrode of the pixel reset transistor. The applying a pixel reset voltage applies the pixel reset voltage to a drain of the pixel reset transistor. The method further includes switching the transfer clock signal to a high state, switching the pixel reset clock signal to a high state, switching the pixel reset voltage to a low state, switching the pixel reset voltage to a high state, and switching the pixel reset clock signal to a low state at a beginning of an integration cycle.

Abstract: A pixel includes five transistors, a photodetector and a storage node. A first transistor is coupled between the photodetector and the storage node. A second transistor is coupled between the storage node and an output drain voltage. A third transistor is coupled between the photodetector and a pixel reset voltage, wherein the pixel reset voltage is different than the output drain voltage. A sensor includes a pixel that includes five transistors, a photodetector and a storage node. A first transistor is coupled between the photodetector and the storage node. A second transistor is coupled between the photodetector and a pixel reset voltage. A gate electrode of the first transistor is coupled to a transfer clock signal that has a low state and a high state. A gate electrode of the second transistor is coupled to a pixel reset clock signal that has a low state and a high state. The transfer clock signal and the pixel reset clock signal are both at a low state during a charge integration interval.

Abstract: A fast frame interline transfer charge coupled device imaging sensor includes an imaging section and an storage section. The imaging section includes a plurality of interline transfer registers, each interline transfer register containing a plurality of interline register elements. The imaging section further includes an interline clocking structure, the interline clocking structure including polycrystalline silicon buss lines used as gate electrodes, the polycrystalline silicon buss lines being connected to a metal strapping network, the interline clocking structure causing charge to be transferred between interline register elements of each interline transfer register based on interline clocking signals. The storage section is coupled to the imaging section. The storage section includes a plurality of storage registers, each storage register containing a plurality of storage register elements. The storage section further includes a storage discharge structure and a storage clocking structure.