Abstract: For determining a prediction mode parameter, a macroblock of an image is divided into a plurality of blocks; most prediction mode parameters corresponding to a plurality of first blocks along a left most edge of the macroblock are determined; most prediction mode parameters corresponding to a plurality of second blocks along a top most edge of the macroblock are determined; and the most prediction mode parameters of the first and second blocks are stored into a buffer allocated with designated position for the plurality of blocks.

Abstract: A flag parameter in a digital image decoding is calculated. For a macroblock consisting of M×N blocks, a first operation is performed on M block along a first edge to obtain M first parameters, and a second operation is performed on N blocks along a second edge to obtain N second parameters. The first and second parameters are stored into corresponding locations in a first and a second buffer array. Then a flag parameter corresponding to a given block is calculated according to corresponding values stored in the first and second buffer arrays. Calculation for all of the M×N blocks is performed in the order that neighboring left and upper blocks next to the give block is processed prior to the given block.

Abstract: A method for determining the boundary strengths of edges in a block-based digitally encoded image is disclosed. The method includes setting the boundary strength of two adjacent blocks in an Inter macroblock to a first strength value if any one of the two adjacent blocks contains non-zero prediction residual in the encoding data and setting the boundary strength thereof to a second strength value if the two adjacent blocks are located in the same motion compensation block. An edge with boundary strength equal to the second strength value will be skipped in a deblocking process.

Abstract: A method for determining the boundary strengths of edges in a block-based digitally encoded image is disclosed. The method includes setting the boundary strength of two adjacent blocks in an Inter macroblock to a first strength value if any one of the two adjacent blocks contains non-zero prediction residual in the encoding data and setting the boundary strength thereof to a second strength value if the two adjacent blocks are located in the same motion compensation block. An edge with boundary strength equal to the second strength value will be skipped in a deblocking process.

Abstract: For determining a prediction mode parameter, a macroblock of an image is divided into a plurality of blocks; most prediction mode parameters corresponding to a plurality of first blocks along a left most edge of the macroblock are determined; most prediction mode parameters corresponding to a plurality of second blocks along a top most edge of the macroblock are determined; and the most prediction mode parameters of the first and second blocks are stored into a buffer allocated with designated position for the plurality of blocks.

Abstract: A flag parameter in a digital image decoding is calculated. For a macroblock consisting of M×N blocks, a first operation is performed on M block along a first edge to obtain M first parameters, and a second operation is performed on N blocks along a second edge to obtain N second parameters. The first and second parameters are stored into corresponding locations in a first and a second buffer array. Then a flag parameter corresponding to a given block is calculated according to corresponding values stored in the first and second buffer arrays. Calculation for all of the M×N blocks is performed in the order that neighboring left and upper blocks next to the give block is processed prior to the given block.

Abstract: A method for determining the boundary strengths of edges in a block-based digitally encoded image is disclosed. The method includes setting the boundary strength of two adjacent blocks in an Inter MB to a first strength value if any one of the two adjacent blocks contains non-zero prediction residual in the encoding data and setting the boundary strength thereof to a second strength value if the two adjacent blocks are located in the same motion compensation block. An edge with boundary strength equal to the second strength value will be skipped in a deblocking process.

Abstract: A computer system includes a processor, and a memory controller electrically connected to the processor and the memory for controlling the accessing operations of the memory. The method includes the processor generating a predetermined logic value and delivering the predetermined logic value to the memory controller, and the memory controller repeatedly overwriting data stored in the plurality of memory units by the predetermined logic value.

Abstract: A computer system has a processor, a memory for storing data, and a memory controller electrically connected to the processor and the memory for controlling data transmission with the memory. The method includes driving the memory controller to retrieve a data bit located in a first memory address, and driving the memory controller to store the data bit in the a second memory address without delivering the data bit to the processor.

Abstract: A personal computer system includes a core logic unit, a graphics accelerator, a first tile converter, a local memory, a second tile converter and a system memory. The core logic unit outputs first image data in a linear mode. The graphics accelerator is in communication with the core logic unit for processing the first image data into second image data in a linear mode. The first tile converter is in communication with the graphics accelerator for converting the second image data into third image data in a tile mode. The local memory is in communication with the first tile converter for storing therein the third image data. The second tile converter is in communication with the core logic unit for converting the first image data into fourth image data in a tile mode. The system memory is accessible by the core logic unit, and includes a graphics accelerating memory in communication with the second tile converter for storing therein the fourth image data.

Abstract: A method for calculating attributes of a 3-D graphic with a vertex shader. The 3-D graphic includes a plurality of triangular primitives, each of which contains three vertexes and each of the vertexes having a plurality of attributes including position attributes. The method includes calculating a triangular transform and related position attributes corresponding to the triangular primitive with a transform program consisting of a couple of instructions of the vertex shader, determining whether the triangular transform is visible or not according to the position attributes of three vertexes of the triangular transform, and calculating remaining attributes of the triangular transform if the triangular transform is visible or not calculating the remaining attributes of the triangular transform and culling the triangular transform if the triangular transform is invisible.

Abstract: A computer system includes a processor, and a memory controller electrically connected to the processor and the memory for controlling the accessing operations of the memory. The method includes the processor generating a predetermined logic value and delivering the predetermined logic value to the memory controller, and the memory controller repeatedly overwriting data stored in the plurality of memory units by the predetermined logic value.

Abstract: A computer system has a processor, a memory for storing data, and a memory controller electrically connected to the processor and the memory for controlling data transmission with the memory. The method includes driving the memory controller to retrieve a data bit located in a first memory address, and driving the memory controller to store the data bit in the a second memory address without delivering the data bit to the processor.

Abstract: A digital data processing system includes a central processing unit and a graphics processor, and the graphics processor includes a transformation/lighting engine. When graphics data, e.g. vertex data, are received, a utilization rate of the central processing unit is detected. Afterward, the graphics data are allocated to either the central processing unit or the transformation/lighting engine of the graphics processor according to the utilization rate of the central processing unit.

Abstract: A personal computer system includes a core logic unit, a graphics accelerator, a first tile converter, a local memory, a second tile converter and a system memory. The core logic unit outputs first image data in a linear mode. The graphics accelerator is in communication with the core logic unit for processing the first image data into second image data in a linear mode. The first tile converter is in communication with the graphics accelerator for converting the second image data into third image data in a tile mode. The local memory is in communication with the first tile converter for storing therein the third image data. The second tile converter is in communication with the core logic unit for converting the first image data into fourth image data in a tile mode. The system memory is accessible by the core logic unit, and includes a graphics accelerating memory in communication with the second tile converter for storing therein the fourth image data.