Abstract: A circuit is for controlling a power transistor of a DC/DC converter. The circuit may include first and second first transistors coupled in series between a first reference voltage and a control terminal of the power transistor, the first and second transistors defining a first junction node. The circuit may include third and fourth transistors coupled in series between the control terminal and a second reference voltage, the third and fourth transistors defining a second junction node. The first and second transistors may have a first conductivity type different from a second conductivity type of the third and fourth transistors. The circuit may include a capacitive element coupled between the first and second junction nodes.

Abstract: A circuit is for controlling a power transistor of a DC/DC converter. The circuit may include first and second first transistors coupled in series between a first reference voltage and a control terminal of the power transistor, the first and second transistors defining a first junction node. The circuit may include third and fourth transistors coupled in series between the control terminal and a second reference voltage, the third and fourth transistors defining a second junction node. The first and second transistors may have a first conductivity type different from a second conductivity type of the third and fourth transistors. The circuit may include a capacitive element coupled between the first and second junction nodes.

Abstract: A device for controlling a matrix screen includes a scanning circuit. The scanning circuit includes a row control block which successively selects each row, and a column control block which, for each selected row, selects or deselects a set of columns of the screen with the aid of column selection or deselection signals. The temporal evolution of each column selection signal and of each column deselection signal includes a first and a second part separated by an intermediate porch. The column control block, for each column of the screen, determines if the corresponding column has to be selected or deselected, determines the value of the capacitance seen by the column termed the column-capacitance, and adjusts temporal evolution characteristics of the selection or deselection signal of at least one column to be selected or deselected as a function of the determined value of its column-capacitance.

Abstract: A device for controlling a matrix screen includes a scanning circuit. The scanning circuit includes a row control block which successively selects each row, and a column control block which, for each selected row, selects or deselects a set of columns of the screen with the aid of column selection or deselection signals. The temporal evolution of each column selection signal and of each column deselection signal includes a first and a second part separated by an intermediate porch. The column control block, for each column of the screen, determines if the corresponding column has to be selected or deselected, determines the value of the capacitance seen by the column termed the column-capacitance, and adjusts temporal evolution characteristics of the selection or deselection signal of at least one column to be selected or deselected as a function of the determined value of its column-capacitance.

Abstract: A device for producing a video image sharpness improvement signal (DOC21-DOC22), with black level clipping of an associated video signal, comprises a differential transconductance stage processing the video signal and whose bias currents (Imax) are directly proportional to the active component (?V) of the video signal so as to bring about a black level sharpness improvement signal clipping.

Abstract: A device and method for generation of a dynamic focus correction signal for use with a CRT that includes an analog scanning processor for generating a dynamic focus correction signal that is proportional to Kx2+(1?K)x4, where x is the distance from a mid point of a viewing surface of the CRT, and K is a real number in the range 0.00 to 1.00. Embodiments of the invention find particular use in CRTs having generally flatter, squarer configurations.

Abstract: A device for producing a video image sharpness improvement signal (DOC21-DOC22), with black level clipping of an associated video signal, comprises a differential transconductance stage processing the video signal and whose bias currents (Imax) are directly proportional to the active component (?V) of the video signal so as to bring about a black level sharpness improvement signal clipping.

Abstract: The present invention relates to a phase-locked loop including a comparator and a charge pump. The comparator compares the phases of an input pulse signal and of a reference pulse signal and generates charge and discharge control signals, the charge pump being capable of charging or discharging the capacitive filter according to the charge and discharge control signals. The filter is charged or discharged when these signals are in a first state and insulated from the charge pump when they are in a second state. The loop includes a device for limiting the charge and discharge current of the capacitive filter, this device including windowing circuits for limiting the time during which the charge and discharge control signals are in the first state.

Abstract: A signal treatment circuit treats an input signal containing line sync pulses used for displaying data on a screen. The circuit contains a phase locked loop to control horizontal sweeping according to active edges of line sync pulses, and a filter circuit that filters equalizing signals from the input signals and provides a filtered input signal to the phase locked loop.

Abstract: The present invention relates to a circuit for processing vertical synchronization logic signals of positive or negative polarity. Based on signals locating, on the one hand, the presence of the beginning of a pulse and, on the other hand, the rising and falling edges in the synchronization signals, a brief pulse is provided in a signal generated by a one-shot. This pulse induces the generation of edges in signals controlling a latch which generates a logic detection signal. According to the polarity of the received signals, the latch is set or reset and the state of the detection signal indicates the polarity of the synchronization signals.

Abstract: The present invention relates to a device for detecting the locking of an automatic gain control circuit, the automatic gain control circuit receiving a signal to be regulated, a check signal and a sampling control signal for driving the operation of the circuit. The detection device includes a comparator receiving the check signal and the signal to be regulated or a signal representative of the signal to be regulated. The comparator generates two logic signals, the states of which form a specific combination of logic states when the value of the signal to be regulated is in a range of values including the value of the check signal. A logic comparator circuit generates a logic comparison signal, the state of which is representative of the presence or absence of this specific combination, and a storage means, driven by the sampling control signal, stores the state of the signal provided by the logic circuit.