Abstract: A device for testing an analog-to-digital converter providing a digital signal at a given sampling frequency, comprising a unit for providing a test signal to the converter, the test signal being a periodic signal comprising frequency components only at a fundamental frequency and at harmonics of the fundamental frequency, the fundamental frequency being a multiple of one quarter of the sampling frequency; a filter capable of receiving the digital signal and of rejecting the fundamental frequency to provide a filtered digital signal; and a unit capable of receiving the digital signal and the filtered digital signal and of providing a signal representative of the ratio between the effective powers of the digital signal and of the filtered digital signal.

Abstract: A device for testing an analog-to-digital converter providing a digital signal at a given sampling frequency, comprising a unit for providing a test signal to the converter, the test signal being a periodic signal comprising frequency components only at a fundamental frequency and at harmonics of the fundamental frequency, the fundamental frequency being a multiple of one quarter of the sampling frequency; a filter capable of receiving the digital signal and of rejecting the fundamental frequency to provide a filtered digital signal; and a unit capable of receiving the digital signal and the filtered digital signal and of providing a signal representative of the ratio between the effective powers of the digital signal and of the filtered digital signal.

Abstract: The invention concerns a device for reading a storage cell (4), comprising a reading differential amplifier (18) having a first input terminal (16) connected to a column of cells (10) and a circuit (34) designed to feed to a second input terminal (20) of the amplifier (18) a reference voltage (Vref). The circuit (34) comprises means (38) for storing the voltage of said column and means (38, 40, 42) for applying as reference voltage (Vref) the stored voltage modified by a predetermined quantity.

Abstract: The invention concerns a device for reading a storage cell (4), comprising a reading differential amplifier (18) having a first input terminal (16) connected to a column of cells (10) and a circuit (34) designed to feed to a second input terminal (20) of the amplifier (18) a reference voltage (Vref). The circuit (34) comprises means (38) for storing the voltage of said column and means (38, 40, 42) for applying as reference voltage (Vref) the stored voltage modified by a predetermined quantity.

Abstract: The invention relates to an arrangement comprising a main amplifier (1, 10) and means (5) for creating, at least during predetermined periods, a floating references voltage (V.sub.G) for applying at least one input signal (V') on at least one first input terminal (E-, E) of the main amplifier, said reference voltage (V.sub.G) being servo-controlled to the equivalent input noise (Vn) of the main amplifier.

Abstract: A self-protected divider bridge in an integrated circuit comprising a P.sup.- substrate, a N.sup.- well, a P region forming a resistor, diffused in said well. A first and a second outmost contact and an intermediate contact are formed on the diffused region. A pad connected to the first contact receives an external voltage higher than the supply voltage of the integrated circuit. The reference potential of the integrated circuit is connected to the second contact and the substrate. A third contact formed on the well close to the first contact is connected to the first contact, and a fourth contact formed on the well close to the second contact is connected to the second contact.

Abstract: Disclosed is a MOS transistor with high threshold voltage comprising, in a semiconductor substrate with a first type of conductivity, surface drain and source regions with the second type of conductivity having a high doping concentration, separated by a thick oxide zone in which there is formed, in the substrate, an overdoped region with the first type of conductivity. Each of the drain and source regions is inserted in a well with the second type of conductivity, having a low doping concentration, formed in the substrate.

Abstract: A circuit is disclosed for the transmission of digital signals on a bifilary line, especially a telephone line. The circuit disclosed is a so-called S interface circuit which has to produce digital signals within certain set limits. The proposed circuit uses four differential amplifiers, each controlling an output transistor (N-channel MOS transistors and P-channel MOS transistors). The amplifiers receive feedback to maintain the overvoltages within acceptable limits. The invention applies especially to the setting up of integrated service digital telephone networks.