Abstract: A sensor (100) includes a fixed gate field-effect transistor (138) that produces a quiescent signal (V.sub.QUIESC1) in a channel (336) when a control signal (V.sub.CONTROL) is applied to a source (332) of the FGFET. A movable gate field-effect transistor (MGFET) (108) produces a sense signal (V.sub.ACCEL) in a channel (316) in response to a physical condition of the sensor when the control signal is applied to a source (312) of the MGFET such that the sense signal is proportional to the quiescent signal. The difference between the currents in the FGFET and MGFET is amplified by a differential amplifier (230) to produce the output signal (V.sub.OUT) of the sensor. The difference between a reference signal (V.sub.RATIO) and the quiescent signal is amplified in an amplifier (206) to produce the control signal that adjusts the output signal to be proportional to the reference signal.

Abstract: A semiconductor device (15) having a sensor (11) and a transistor (10) formed on a monolithic semiconductor substrate (16). The sensor (11) has a source region (41), a drain region (42), and a microstructure (12) which is formed from a conductive layer (28). The microstructure (12) modulates a channel region between the source and drain regions (41,42). The transistor has a gate structure, a portion of which is formed from the same conductive layer (28) used to form the microstructure (12). Anneal steps are performed on the conductive layer (28) to remove stress prior to the formation of source and drain regions (34,36) of the transistor (10). A self-test structure (14) is formed adjacent to the microstructure (12) which is used to calibrate and verify the operation of the sensor (11).

Abstract: A matrix including a plurality of light emitting devices organized into a plurality of rows of first contacts and columns of second contacts. Row/column decoding switches each coupled to a number of individual rows/columns and to a number of row/column address lines for selecting an addressed one of the number of individual rows/columns, and to an individual row/column data lead for selecting a row/column decoding switch. The matrix and row and column switches are integrated onto a common substrate. A programmable voltage source is coupled to the column decoding switches by the column data leads and a programmable current sink is coupled to the row decoding switches by the row data leads.

Abstract: Converting a Coriolis force into an electrical signal, an electro-mechanical transducer (10) is a field effect transistor (18) having angular velocity sensing capabilities. A gate electrode (16) is suspended over a channel region (60) of a substrate (31), is biased at a desired potential, and is oscillated along an axis (40). The gate electrode (16) and the substrate (31) are rotated about a different axis (41) at an angular velocity (44). The resulting Coriolis force displaces the suspended gate electrode (16) along yet another axis (42) which modulates a current (53) in the channel region (60) of the substrate (31). The amplitude of the current (53) describes the magnitude of the angular velocity (44).

Abstract: A circuit for detecting a very large output current threshold with respect to a flow reference current. The threshold detector circuit includes a multiple transistor circuit wherein a pair of emitter areas are ratioed with respect to each other, and which have common bases, and an error amplifier the inputs of which are connected to the respective emitters of the multiple transistor circuit. An output current is sourced from the emitter of the multiple transistor circuit having the larger area which output current is a function of the load coupled therewith to thereby produce a voltage at this emitter the magnitude thereof being a function of the output current.

Abstract: A comparator circuit comprising a pair of PNP input transistors having their collector-emitter paths coupled between first and second conductors. The output of the comparator is coupled to the base of a PNP transistor. The inputs of the comparator are coupled to the bases of the pair of PNP transistors and receive differential input signals thereat. A resistive element is connected between the input and base of one of the pair of transistors to produce an offset voltage which cancels any offset voltage produced at the input of the comparator caused by an error current that flows through the other one of the pair of transistors. The error current is due to base current flow from the PNP transistor that is connected to the output of the comparator.

Abstract: A comparator circuit which includes a differential pair of transistors forming differential inputs of the comparator and a voltage level shift circuit coupled in series connection path with the emitters of the pair of transistors. The voltage level shift circuit includes an additional transistor having its collector-emitter path connected in series between an output of the comparator and the emitter of the first pair of transistors; a first diode coupled a series-conduction path to the emitter of the second one of the pair of transistors and having an anode connected to the base of the additional transistor; and a second diode coupled between the base and emitter of the additional transistor wherein the effective beta of the additional transistor is reduced to reduce the bias current that would otherwise flow through the first transistor when such transistor is rendered conductive by an applied differential input signal.

Abstract: A solid state circuit for providing a DC regulated output voltage at an output thereof wherein the circuit exhibits excellent ripple rejection performance to maintain the regulated output voltage constant with perturbations in the supply voltage applied to the circuit. The circuit includes a precision current source for providing output currents to a load circuit which is connected between the current source and ground reference. A bias reference potential is applied to the load circuit which has an output connected to the output of the circuit and a feedback loop for causing the DC regulated voltage to be proportional to the bias reference potential. A frequency compensation circuit is included that is coupled across outputs of the current source which enhances the ripple rejection performance of the circuit to higher frequency component transients of such perturbations in the supply voltage.

Abstract: A circuit for providing a current at an output thereof of a predetermined value which has excellent ripple rejection characteristics whereby the magnitude of the current is maintain substantially constant with variations in the voltage supply applied thereto. The current source includes first and second complementary current mirror circuits interconnected such that the second current mirror sinks the current sourced from the first current mirror. A feedback loop latches the circuit into a stable operation and senses any difference current between the two current mirror circuits caused by perturbations of the supply voltage to produce feedback to maintain the circuit at its quiescent operating point.

Abstract: A circuit for providing an output current the magnitude of which is substantially independent to variations in the power supply voltage applied thereto. The circuit comprises first and second current sourcing transistors, and a conventional .DELTA.V.sub.be /R current mirror circuit for setting the current sourced from the two transistors. At least one output transistor having its base and emitter electrodes coupled in parallel with the base and emitter electrodes of the two transistors is included for sourcing the output current.