Patents by Inventor Eric Demers

Eric Demers has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20260147578
    Abstract: Aspects presented herein relate to methods and devices for graphics processing including an apparatus, e.g., a GPU. The apparatus may obtain a set of instructions associated with the graphics processing. The apparatus may also determine a priority order for each of the set of instructions associated with the graphics processing. Further, the apparatus may identify at least one instruction in the set of instructions based on the priority order for each of the set of instructions. The apparatus may also execute the at least one instruction based on identification of the at least one instruction.
    Type: Application
    Filed: November 27, 2024
    Publication date: May 28, 2026
    Inventors: Yun DU, Zilin YING, Wenfeng HUANG, Sai Ramesh BHYRAVAJOSULA, Andrew Evan GRUBER, Chun YU, Eric DEMERS
  • Publication number: 20260148329
    Abstract: Aspects presented herein relate to methods and devices for graphics processing including an apparatus, e.g., a GPU. The apparatus may obtain a set of instructions for a data read/write process at a GPU. The apparatus may also obtain an indication of a dependency between first information for a first instruction in the set of instructions and second information for a second instruction in the set of instructions, where the first instruction is associated with a first component and the second instruction is associated with a second component. Further, the apparatus may determine an amount of storage space at the GPU for the first information for the first instruction. The apparatus may also store, based on the amount of the storage space at the GPU, the first information for the first instruction in a first memory at the GPU or a second memory at the GPU.
    Type: Application
    Filed: November 27, 2024
    Publication date: May 28, 2026
    Inventors: Yun DU, Fei WEI, Hongjiang SHANG, Chiente HO, Gang ZHONG, Sheng GU, Sai Ramesh BHYRAVAJOSULA, Chihong ZHANG, Jian JIANG, Andrew Evan GRUBER, Chun YU, Eric DEMERS
  • Publication number: 20260148328
    Abstract: Aspects presented herein relate to methods and devices for graphics processing including an apparatus, e.g., a GPU. The apparatus may initiate an execution of a set of instructions including a first instruction and a second instruction. The apparatus may also determine whether data is pending for one of the first instruction or the second instruction Further, the apparatus may suspend the execution of the first instruction and the second instruction based on the data being pending for one of the first instruction or the second instruction.
    Type: Application
    Filed: November 27, 2024
    Publication date: May 28, 2026
    Inventors: Yun DU, Zilin YING, Yang XIA, Wenfeng HUANG, Andrew Evan GRUBER, Chun YU, Eric DEMERS
  • Publication number: 20260148330
    Abstract: Aspects presented herein relate to methods and devices for graphics processing including an apparatus, e.g., a GPU. The apparatus may obtain an indication of a graphics operation, where the graphics operation is associated with data in a data block. The apparatus may also determine whether a value for at least some data in the data block is identical to a value for at least some other data in the data block. Further, the apparatus may refrain from executing the at least some data in the data block based on the value for the at least some data in the data block being identical to the value for the at least some other data in the data block.
    Type: Application
    Filed: November 27, 2024
    Publication date: May 28, 2026
    Inventors: Yun DU, Fei WEI, Yang XIA, Chiente HO, Mengbo ZHOU, Bagus Prasetyo WIBOWO, Jia YAO, Andrew Evan GRUBER, Chun YU, Eric DEMERS
  • Publication number: 20260065408
    Abstract: Aspects presented herein relate to methods and devices for graphics processing including an apparatus, e.g., a GPU. The apparatus may obtain an indication of set of draw calls, wherein each of the set of draw calls includes a shader preamble. The apparatus may also obtain an indication of a division of each shader preamble for each of the set of draw calls into a plurality of shader preamble sections. Further, the apparatus may execute, based on the division of each shader preamble, each of the plurality of shader preamble sections for each of the set of draw calls.
    Type: Application
    Filed: August 30, 2024
    Publication date: March 5, 2026
    Inventors: Yun DU, Zilin YING, Gang ZHONG, Chihong ZHANG, Jian JIANG, Andrew Evan GRUBER, Chun YU, Eric DEMERS
  • Patent number: 12229215
    Abstract: The present disclosure relates to methods and apparatus for compute processing. For example, disclosed techniques facilitate improving performance of matrix multiplication in streaming processor. Aspects of the present disclosure can execute, with a load control unit, a first load instruction to load a set of input data of an input matrix from a first memory to a second memory. Aspects of the present disclosure can also execute, with the load control unit, a second load instruction to load a set of weight data of a weight matrix from the first memory to the second memory. Additionally, aspects of the present disclosure can perform, with an ALU component, a matrix multiplication operation using the set of input data and the set of weight data to generate an output matrix. Further, aspects of the present disclosure can store the output matrix at a general purpose register accessible to the ALU component.
    Type: Grant
    Filed: October 16, 2023
    Date of Patent: February 18, 2025
    Assignee: QUALCOMM Incorporated
    Inventors: Yun Du, Gang Zhong, Fei Wei, Yibin Zhang, Jing Han, Hongjiang Shang, Elina Kamenetskaya, Minjie Huang, Alexei Vladimirovich Bourd, Chun Yu, Andrew Evan Gruber, Eric Demers
  • Patent number: 12229864
    Abstract: This disclosure provides systems, devices, apparatus, and methods, including computer programs encoded on storage media, for runtime optimization of the shader execution flow. A graphics processor may obtain instruction execution data associated with a graphics workload, the instruction execution data including graphics data for a set of shader operations. The graphics processor may configure, at a first iteration, at least one predication value based on the instruction execution data including the graphics data for the set of shader operations. The graphics processor may adjust, at a second iteration, an execution flow of the graphics workload based on the configured at least one predication value, the execution flow of the graphics workload including the set of shader operations. The graphics processor may execute or refrain from executing, at the second iteration, each of the set of shader operations based on the adjusted execution flow of the graphics workload.
    Type: Grant
    Filed: August 5, 2022
    Date of Patent: February 18, 2025
    Assignee: QUALCOMM Incorporated
    Inventors: Yun Du, Eric Demers, Andrew Evan Gruber, Chun Yu, Baoguang Yang, Chihong Zhang, Yuehai Du, Avinash Seetharamaiah, Jonnala Gadda Nagendra Kumar, Gang Zhong, Zilin Ying, Fei Wei
  • Patent number: 12067666
    Abstract: Aspects presented herein relate to methods and devices for graphics processing including an apparatus, e.g., a GPU. The apparatus may receive a set of draw call instructions corresponding to a graphics workload, where the set of draw call instructions is associated with at least one run-time parameter. The apparatus may also obtain a first shader program associated with storing data in a system memory and at least one second shader program associated with storing data in a constant memory. Further, the apparatus may execute the first shader program or the at least one second shader program based on whether the at least one run-time parameter is less than or equal to a size of the constant memory. The apparatus may also update or maintain a configuration of a shader processor or a streaming processor based on executing the first shader program or the at least one second shader program.
    Type: Grant
    Filed: May 18, 2022
    Date of Patent: August 20, 2024
    Assignee: QUALCOMM Incorporated
    Inventors: Yun Du, Eric Demers, Andrew Evan Gruber, Chun Yu, Chihong Zhang, Baoguang Yang, Yuehai Du, Gang Zhong, Avinash Seetharamaiah, Jonnala Gadda Nagendra Kumar
  • Patent number: 11954758
    Abstract: This disclosure provides systems, devices, apparatus, and methods, including computer programs encoded on storage media, for dynamic wave pairing. A graphics processor may allocate one or more GPU workloads to one or more wave slots of a plurality of wave slots. The graphics processor may select a first execution slot of a plurality of execution slots for executing the one or more GPU workloads. The selection may be based on one of a plurality of granularities. The graphics processor may execute, at the selected first execution slot, the one or more GPU workloads at the one of the plurality of granularities.
    Type: Grant
    Filed: February 24, 2022
    Date of Patent: April 9, 2024
    Assignee: QUALCOMM Incorporated
    Inventors: Yun Du, Andrew Evan Gruber, Zilin Ying, Chunling Hu, Baoguang Yang, Yang Xia, Gang Zhong, Chun Yu, Eric Demers
  • Publication number: 20240046543
    Abstract: This disclosure provides systems, devices, apparatus, and methods, including computer programs encoded on storage media, for runtime optimization of the shader execution flow. A graphics processor may obtain instruction execution data associated with a graphics workload, the instruction execution data including graphics data for a set of shader operations. The graphics processor may configure, at a first iteration, at least one predication value based on the instruction execution data including the graphics data for the set of shader operations. The graphics processor may adjust, at a second iteration, an execution flow of the graphics workload based on the configured at least one predication value, the execution flow of the graphics workload including the set of shader operations. The graphics processor may execute or refrain from executing, at the second iteration, each of the set of shader operations based on the adjusted execution flow of the graphics workload.
    Type: Application
    Filed: August 5, 2022
    Publication date: February 8, 2024
    Inventors: Yun DU, Eric DEMERS, Andrew Evan GRUBER, Chun YU, Baoguang YANG, Chihong ZHANG, Yuehai DU, Avinash SEETHARAMAIAH, Jonnala Gadda NAGENDRA KUMAR, Gang ZHONG, Zilin YING, Fei WEI
  • Publication number: 20240037183
    Abstract: The present disclosure relates to methods and apparatus for compute processing. For example, disclosed techniques facilitate improving performance of matrix multiplication in streaming processor. Aspects of the present disclosure can execute, with a load control unit, a first load instruction to load a set of input data of an input matrix from a first memory to a second memory. Aspects of the present disclosure can also execute, with the load control unit, a second load instruction to load a set of weight data of a weight matrix from the first memory to the second memory. Additionally, aspects of the present disclosure can perform, with an ALU component, a matrix multiplication operation using the set of input data and the set of weight data to generate an output matrix. Further, aspects of the present disclosure can store the output matrix at a general purpose register accessible to the ALU component.
    Type: Application
    Filed: October 16, 2023
    Publication date: February 1, 2024
    Inventors: Yun DU, Gang ZHONG, Fei WEI, Yibin ZHANG, Jing HAN, Hongjiang SHANG, Elina KAMENETSKAYA, Minjie HUANG, Alexei Vladimirovich BOURD, Chun YU, Andrew Evan GRUBER, Eric DEMERS
  • Patent number: 11829439
    Abstract: The present disclosure relates to methods and apparatus for compute processing. For example, disclosed techniques facilitate improving performance of matrix multiplication in streaming processor. Aspects of the present disclosure can execute, with a load control unit, a first load instruction to load a set of input data of an input matrix from a first memory to a second memory. Aspects of the present disclosure can also execute, with the load control unit, a second load instruction to load a set of weight data of a weight matrix from the first memory to the second memory. Additionally, aspects of the present disclosure can perform, with an ALU component, a matrix multiplication operation using the set of input data and the set of weight data to generate an output matrix. Further, aspects of the present disclosure can store the output matrix at a general purpose register accessible to the ALU component.
    Type: Grant
    Filed: December 29, 2020
    Date of Patent: November 28, 2023
    Assignee: QUALCOMM Incorporated
    Inventors: Yun Du, Gang Zhong, Fei Wei, Yibin Zhang, Jing Han, Hongjiang Shang, Elina Kamenetskaya, Minjie Huang, Alexei Vladimirovich Bourd, Chun Yu, Andrew Evan Gruber, Eric Demers
  • Publication number: 20230377240
    Abstract: Aspects presented herein relate to methods and devices for graphics processing including an apparatus, e.g., a GPU. The apparatus may receive a set of draw call instructions corresponding to a graphics workload, where the set of draw call instructions is associated with at least one run-time parameter. The apparatus may also obtain a first shader program associated with storing data in a system memory and at least one second shader program associated with storing data in a constant memory. Further, the apparatus may execute the first shader program or the at least one second shader program based on whether the at least one run-time parameter is less than or equal to a size of the constant memory. The apparatus may also update or maintain a configuration of a shader processor or a streaming processor based on executing the first shader program or the at least one second shader program.
    Type: Application
    Filed: May 18, 2022
    Publication date: November 23, 2023
    Inventors: Yun DU, Eric DEMERS, Andrew Evan GRUBER, Chun YU, Chihong ZHANG, Baoguang YANG, Yuehai DU, Gang ZHONG, Avinash SEETHARAMAIAH, Jonnala Gadda NAGENDRA KUMAR
  • Publication number: 20230267567
    Abstract: This disclosure provides systems, devices, apparatus, and methods, including computer programs encoded on storage media, for dynamic wave pairing. A graphics processor may allocate one or more GPU workloads to one or more wave slots of a plurality of wave slots. The graphics processor may select a first execution slot of a plurality of execution slots for executing the one or more GPU workloads. The selection may be based on one of a plurality of granularities. The graphics processor may execute, at the selected first execution slot, the one or more GPU workloads at the one of the plurality of granularities.
    Type: Application
    Filed: February 24, 2022
    Publication date: August 24, 2023
    Inventors: Yun DU, Andrew Evan GRUBER, Zilin YING, Chunling HU, Baoguang YANG, Yang XIA, Gang ZHONG, Chun YU, Eric DEMERS
  • Patent number: 11657471
    Abstract: The present disclosure relates to methods and devices for graphics processing including an apparatus, e.g., a GPU. The apparatus may generate a table including a plurality of entries to store data associated with at least one of a constant value or an immediate value. The apparatus may also process, upon generating the table, first data including at least one of a constant value or an immediate value. Further, the apparatus may store, in the generated table, at least one of the constant value or the immediate value of the first data. The apparatus may also transmit, upon storing at least one of the constant value or the immediate value in the table, the table including the stored at least one of the constant value or the immediate value of the first data.
    Type: Grant
    Filed: June 23, 2021
    Date of Patent: May 23, 2023
    Assignee: QUALCOMM Incorporated
    Inventors: Yun Du, Andrew Evan Gruber, Chihong Zhang, Jian Jiang, Gang Zhong, Baoguang Yang, Yang Xia, Chun Yu, Eric Demers
  • Publication number: 20220414814
    Abstract: The present disclosure relates to methods and devices for graphics processing including an apparatus, e.g., a GPU. The apparatus may generate a table including a plurality of entries to store data associated with at least one of a constant value or an immediate value. The apparatus may also process, upon generating the table, first data including at least one of a constant value or an immediate value. Further, the apparatus may store, in the generated table, at least one of the constant value or the immediate value of the first data. The apparatus may also transmit, upon storing at least one of the constant value or the immediate value in the table, the table including the stored at least one of the constant value or the immediate value of the first data.
    Type: Application
    Filed: June 23, 2021
    Publication date: December 29, 2022
    Inventors: Yun DU, Andrew Evan GRUBER, Chihong ZHANG, Jian JIANG, Gang ZHONG, Baoguang YANG, Yang XIA, Chun YU, Eric DEMERS
  • Publication number: 20220357983
    Abstract: The present disclosure relates to methods and devices for graphics processing including an apparatus, e.g., a GPU. The apparatus may receive a plurality of workloads based on a workload order, each of the plurality of workloads being received in the workload order including at least a first workload and a second workload. The apparatus may also allocate one or more workloads of the plurality of workloads to one or more wave slots. Additionally, the apparatus may execute the one or more allocated workloads at the one or more wave slots, such that at least the first workload is executed at the first wave slot and the second workload is executed at the second wave slot. The apparatus may also allocate at least one other workload of the plurality of workloads to at least one previously-allocated wave slot of the one or more wave slots.
    Type: Application
    Filed: May 7, 2021
    Publication date: November 10, 2022
    Inventors: Yun DU, Andrew Evan GRUBER, Zilin YING, Gang ZHONG, Baoguang YANG, Yang YU, Yang XIA, Ravindra KUMAR, Chun YU, Eric DEMERS
  • Patent number: 11204765
    Abstract: A graphics processing unit (GPU) utilizes block general purpose registers (bGPRs) to load multiple waves of samples for an instruction group into a processing pipeline and receive processed samples from the pipeline. The GPU acquires a credit for the bGPR for execution of the instruction group for a first wave using a persistent GPR and the bGPR. The GPU refunds the credit upon loading the first wave into the pipeline. The GPU executes a subsequent wave for the instruction group to load samples to the pipeline when at least one credit is available and the pipeline is processing the first wave. The GPU stores an indication of each wave that has been loaded into the pipeline in a queue. The GPU returns samples for a next wave in the queue from the pipeline to the bGPR for further processing when the physical slot of the bGPR is available.
    Type: Grant
    Filed: August 26, 2020
    Date of Patent: December 21, 2021
    Assignee: QUALCOMM Incorporated
    Inventors: Yun Du, Fei Wei, Gang Zhong, Minjie Huang, Jian Jiang, Zilin Ying, Baoguang Yang, Yang Xia, Jing Han, Liangxiao Hu, Chihong Zhang, Chun Yu, Andrew Evan Gruber, Eric Demers
  • Patent number: 11132760
    Abstract: Methods, systems, and devices for graphic processing are described. The methods, systems, and devices may include or be associated with identifying a graphics instruction, determining that the graphics instruction is alias enabled for the device, partitioning an alias lookup table into one or more slots, allocating a slot of the alias lookup table based on the partitioning and determining that the graphics instruction is alias enabled, generating an alias instruction based on allocating the slot of the alias lookup table and determining that the graphics instruction is alias enabled, and processing the alias instruction.
    Type: Grant
    Filed: December 13, 2019
    Date of Patent: September 28, 2021
    Assignee: QUALCOMM Incorporated
    Inventors: Yun Du, Andrew Evan Gruber, Chihong Zhang, Gang Zhong, Jian Jiang, Fei Wei, Minjie Huang, Zilin Ying, Yang Xia, Jing Han, Chun Yu, Eric Demers
  • Publication number: 20210200836
    Abstract: The present disclosure relates to methods and apparatus for compute processing. For example, disclosed techniques facilitate improving performance of matrix multiplication in streaming processor. Aspects of the present disclosure can execute, with a load control unit, a first load instruction to load a set of input data of an input matrix from a first memory to a second memory. Aspects of the present disclosure can also execute, with the load control unit, a second load instruction to load a set of weight data of a weight matrix from the first memory to the second memory. Additionally, aspects of the present disclosure can perform, with an ALU component, a matrix multiplication operation using the set of input data and the set of weight data to generate an output matrix. Further, aspects of the present disclosure can store the output matrix at a general purpose register accessible to the ALU component.
    Type: Application
    Filed: December 29, 2020
    Publication date: July 1, 2021
    Inventors: Yun DU, Gang ZHONG, Fei WEI, Yibin ZHANG, Jing HAN, Hongjiang SHANG, Elina KAMENETSKAYA, Minjie HUANG, Alexei Vladimirovich BOURD, Chun YU, Andrew Evan GRUBER, Eric DEMERS