Patents by Inventor Eric Desbonnets

Eric Desbonnets has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200169222
    Abstract: A method for minimizing harmonic distortion and/or intermodulation distortion of a radiofrequency signal propagating in a radiofrequency circuit formed on a semiconductor substrate coated with an electrically insulating layer, wherein a curve representing the distortion as a function of a power of the input or output signal exhibits a trough around a given power (PDip), the method comprises applying, between the radiofrequency circuit and the semiconductor substrate, an electrical potential difference (VGB) chosen so as to move the trough toward a given operating power of the radiofrequency circuit.
    Type: Application
    Filed: May 23, 2018
    Publication date: May 28, 2020
    Inventors: Marcel Broekaart, Frederic Allibert, Eric Desbonnets, Jean-Pierre Raskin, Martin Rack
  • Patent number: 10608610
    Abstract: A substrate for a surface acoustic wave device or bulk acoustic wave device, comprising a support substrate and an piezoelectric layer on the support substrate, wherein the support substrate comprises a semiconductor layer on a stiffening substrate having a coefficient of thermal expansion that is closer to the coefficient of thermal expansion of the material of the piezoelectric layer than that of silicon, the semiconductor layer being arranged between the piezoelectric layer and the stiffening substrate.
    Type: Grant
    Filed: December 21, 2016
    Date of Patent: March 31, 2020
    Assignee: Soitec
    Inventors: Marcel Broekaart, Thierry Barge, Pascal Guenard, Ionut Radu, Eric Desbonnets, Oleg Kononchuk
  • Publication number: 20190372243
    Abstract: A structure for a for radiofrequency application applications includes a high-resistivity support substrate having a front face defining a main plane, a charge-trapping layer disposed on the front face of the support substrate, a first dielectric layer disposed on the charge-trapping layer, an active layer disposed on the first dielectric layer, at least one buried electrode disposed above or in the charge-trapping layer. The buried electrode comprises a conductive layer and a second dielectric layer.
    Type: Application
    Filed: January 29, 2018
    Publication date: December 5, 2019
    Inventors: Eric Desbonnets, Bernard Aspar
  • Patent number: 10429436
    Abstract: The disclosure relates to a device for measuring an electrical characteristic of a substrate comprising a support made of a dielectric material having a bearing surface, the support comprising an electrical test structure having a contact surface flush with the bearing surface of the support, the bearing surface of the support and the contact surface of the electrical test structure being suitable for coming into close contact with a substrate. The measurement device also comprises at least one connection bump contact formed on another surface of the support and electrically linked to the electrical test structure. This disclosure also relates to a system for characterizing a substrate and a method for measuring a characteristic of a substrate employing the measurement device.
    Type: Grant
    Filed: January 19, 2016
    Date of Patent: October 1, 2019
    Assignee: Soitec
    Inventors: Cédric Malaquin, Jean-Pierre Raskin, Eric Desbonnets
  • Patent number: 10347597
    Abstract: A structure for radiofrequency applications includes: a support substrate of high-resistivity silicon comprising a lower part and an upper part having undergone a p-type doping to a depth D; a mesoporous trapping layer of silicon formed in the doped upper part of the support substrate. The depth D is less than 1 micron and the trapping layer has a porosity rate of between 20% and 60%.
    Type: Grant
    Filed: July 3, 2015
    Date of Patent: July 9, 2019
    Assignee: Soitec
    Inventors: Oleg Kononchuk, William Van Den Daele, Eric Desbonnets
  • Publication number: 20190157137
    Abstract: A substrate for microelectronic radiofrequency devices includes a carrier substrate made of a first semiconductor material having a resistivity higher than 500 ohms·cm; a plurality of trenches in the carrier substrate, which trenches are filled with a second material, and defining on a first side of the carrier substrate a plurality of first zones made of a first material and at least one second zone made of a second material. The second material has a resistivity higher than 10 kohms·cm, and the first zones have a maximum dimension smaller than 10 microns and are insulated from one another by the second zone.
    Type: Application
    Filed: June 6, 2017
    Publication date: May 23, 2019
    Applicant: Soitec
    Inventors: Eric Desbonnets, Ionut Radu, Oleg Kononchuk, Jean-Pierre Raskin
  • Patent number: 10276492
    Abstract: Methods of forming a semiconductor structure include forming a device layer on an initial substrate, attaching a first surface of the device layer to a temporary substrate and forming a high resistivity layer on a second surface of the device layer by removing a portion of the initial substrate. Methods further include attaching a final substrate to the high resistivity layer and removing the temporary substrate. Semiconductor structures are fabricated by such methods that include a final substrate, a high resistivity layer disposed over the final substrate and a device layer disposed over the high resistivity layer.
    Type: Grant
    Filed: January 13, 2017
    Date of Patent: April 30, 2019
    Assignee: Soitec
    Inventors: Ionut Radu, Eric Desbonnets
  • Patent number: 10270413
    Abstract: This disclosure relates to a method of fabrication of a surface acoustic wave device comprising the step (a) of providing a piezoelectric structure, the step (b) of providing a dielectric structure, wherein the step (b) comprises a step (b1) of metalizing the dielectric structure, and the method further comprising the step (c) of bonding the metalized dielectric structure to the piezoelectric structure.
    Type: Grant
    Filed: March 21, 2014
    Date of Patent: April 23, 2019
    Assignee: Soitec
    Inventors: Christophe Zinke, Eric Desbonnets
  • Publication number: 20190036007
    Abstract: The disclosure relates to a hybrid structure for a surface-acoustic-wave device comprising a useful layer of piezoelectric material joined to a carrier substrate having a thermal expansion coefficient lower than that of the useful layer; the hybrid structure comprising an intermediate layer located between the useful layer and the carrier substrate, the intermediate layer being a structured layer formed from at least two different materials comprising a plurality of periodic motifs in the plane of the intermediate layer.
    Type: Application
    Filed: January 17, 2017
    Publication date: January 31, 2019
    Applicant: Soitec
    Inventors: Oleg KONONCHUK, Eric BUTAUD, Eric DESBONNETS
  • Publication number: 20190007024
    Abstract: A substrate for a surface acoustic wave device or bulk acoustic wave device, comprising a support substrate and an piezoelectric layer on the support substrate, wherein the support substrate comprises a semiconductor layer on a stiffening substrate having a coefficient of thermal expansion that is closer to the coefficient of thermal expansion of the material of the piezoelectric layer than that of silicon, the semiconductor layer being arranged between the piezoelectric layer and the stiffening substrate.
    Type: Application
    Filed: December 21, 2016
    Publication date: January 3, 2019
    Inventors: Marcel Broekaart, Thierry Barge, Pascal Guenard, Ionut Radu, Eric Desbonnets, Oleg Kononchuk
  • Publication number: 20180316329
    Abstract: A composite structure for an acoustic wave device comprising a heterostructure includes: a useful layer of piezoelectric material, having a first face and a second face, the first face being arranged at a first bonding interface on a support substrate having a coefficient of thermal expansion less than that of the useful layer, wherein the composite structure further comprises a functional layer, an entire surface of which is arranged at a second bonding interface on the second face of the useful layer and having a coefficient of thermal expansion less than that of the useful layer. Methods are used for producing such a composite structure.
    Type: Application
    Filed: October 17, 2016
    Publication date: November 1, 2018
    Inventors: Pascal Guenard, Ionut Radu, Didier Landru, Eric Desbonnets
  • Publication number: 20180024186
    Abstract: The disclosure relates to a device for measuring an electrical characteristic of a substrate comprising a support made of a dielectric material having a bearing surface, the support comprising an electrical test structure having a contact surface flush with the bearing surface of the support, the bearing surface of the support and the contact surface of the electrical test structure being suitable for coming into close contact with a substrate. The measurement device also comprises at least one connection bump contact formed on another surface of the support and electrically linked to the electrical test structure. This disclosure also relates to a system for characterizing a substrate and a method for measuring a characteristic of a substrate employing the measurement device.
    Type: Application
    Filed: January 19, 2016
    Publication date: January 25, 2018
    Applicant: Soitec
    Inventors: Cédric Malaquin, Jean-Pierre Raskin, Eric Desbonnets
  • Publication number: 20170221839
    Abstract: A structure for radiofrequency applications includes: a support substrate of high-resistivity silicon comprising a lower part and an upper part having undergone a p-type doping to a depth D; mesoporous trapping layer of silicon formed in the doped upper part of the support substrate. The depth D is less than 1 micron and the trapping layer has a porosity rate of between 20% and 60%.
    Type: Application
    Filed: July 3, 2015
    Publication date: August 3, 2017
    Inventors: Oleg Kononchuk, William Van Den Daele, Eric Desbonnets
  • Publication number: 20170207164
    Abstract: Methods of forming a semiconductor structure include forming a device layer on an initial substrate, attaching a first surface of the device layer to a temporary substrate and forming a high resistivity layer on a second surface of the device layer by removing a portion of the initial substrate. Methods further include attaching a final substrate to the high resistivity layer and removing the temporary substrate. Semiconductor structures are fabricated by such methods that include a final substrate, a high resistivity layer disposed over the final substrate and a device layer disposed over the high resistivity layer.
    Type: Application
    Filed: January 13, 2017
    Publication date: July 20, 2017
    Inventors: Ionut Radu, Eric Desbonnets
  • Publication number: 20160065162
    Abstract: This disclosure relates to a method of fabrication of a surface acoustic wave device comprising the step (a) of providing a piezoelectric structure, the step (b) of providing a dielectric structure, wherein the step (b) comprises a step (b1) of metalizing the dielectric structure, and the method further comprising the step (c) of bonding the metalized dielectric structure to the piezoelectric structure.
    Type: Application
    Filed: March 21, 2014
    Publication date: March 3, 2016
    Inventors: Christophe Zinke, Eric Desbonnets
  • Patent number: 9198294
    Abstract: The invention relates to an electronic device for radiofrequency or power applications, comprising a semiconductor layer supporting electronic components on a support substrate, wherein the support substrate comprises a base layer having a thermal conductivity of at least 30 W/mK and a superficial layer having a thickness of at least 5 ?m, the superficial layer having an electrical resistivity of at least 3000 Ohm·cm and a thermal conductivity of at least 30 W/mK. The invention also relates to two processes for manufacturing such a device.
    Type: Grant
    Filed: November 16, 2011
    Date of Patent: November 24, 2015
    Assignee: SOITEC
    Inventors: Didier Landru, Luciana Capello, Eric Desbonnet, Christophe Figuet, Oleg Kononchuk
  • Publication number: 20130294038
    Abstract: The invention relates to an electronic device for radio frequency or power applications, comprising a semiconductor layer supporting electronic components on a support substrate, wherein the support substrate comprises a base layer having a thermal conductivity of at least 30 W/m K and a superficial layer having a thickness of at least 5 ?m, the superficial layer having an electrical resistivity of at least 3000 Ohm·cm and a thermal conductivity of at least 30 W/m K. The invention also relates to two processes for manufacturing such a device.
    Type: Application
    Filed: November 16, 2011
    Publication date: November 7, 2013
    Applicant: SOITEC
    Inventors: Didier Landru, Luciana Capello, Eric Desbonnet, Christophe Figuet, Oleg Kononchuk
  • Patent number: 7420409
    Abstract: The invention relates to a demodulator to demodulate frequency-modulated signals FM including a phase locked loop PLL including at least a phase detector, a loop filter and a voltage controlled oscillator function VCO?, characterized in that said voltage controlled oscillator function VCO? has modifiable gain. The invention allows to eliminate drawbacks presented by the conventional use of a complex gain modifiable amplifier at the input of demodulated signal processing means. Application: demodulation of modulated signals: wireless phone, home network.
    Type: Grant
    Filed: October 9, 2003
    Date of Patent: September 2, 2008
    Assignee: DSP Group Switzerland AG
    Inventors: Eric Desbonnets, Frédéric Parillaud, Erick Giroux
  • Publication number: 20060071708
    Abstract: The invention relates to a demodulator to demodulate frequency-modulated signals FM including a phase locked loop PLL including at least a phase detector, a loop filter and a voltage controlled oscillator function VCO?, characterized in that said voltage controlled oscillator function VCO? has modifiable gain. The invention allows to eliminate drawbacks presented by the conventional use of a complex gain modifiable amplifier at the input of demodulated signal processing means. Application: demodulation of modulated signals: wireless phone, home network.
    Type: Application
    Filed: October 9, 2003
    Publication date: April 6, 2006
    Inventors: Eric Desbonnets, Frederic Parillaud, Erick Giroux
  • Patent number: 6052015
    Abstract: The present invention discloses an output stage for a charge pump, mainly formed by transistors, for example, MOS-type transistors. This output stage includes capacitive elements intended to compensate charge/discharge phenomena of parasitic capacitances intrinsic to the transistors. A charge pump including such a stage may thus produce a low-value nominal current and enables to completely integrate a phase-locked loop demodulator.
    Type: Grant
    Filed: July 9, 1998
    Date of Patent: April 18, 2000
    Assignee: U.S. Philips Corporation
    Inventor: Eric Desbonnets