Abstract: A video decoding device receives video images encoded as video signal data for a selected one of multiple channels, for example provided by a cable TV or satellite TV service. Responsive to a request to switch from viewing a previously-selected channel to viewing a newly-selected channel, the video decoding device enters a first mode for displaying a preview representation of the video signal data received for the newly-selected channel. In this preview mode, video signal data for the newly-selected channel is received and stored, and a first available image from the video signal data is decoded and provided for display as a preview representation. The preview mode image is replaced by a real time representation of the video signal data once it is determined that the stored video signal data exceeds a threshold amount, for example an amount to compensate for maximum expected jitter.

Abstract: A device for generating an encrypted master key. The device comprises at least one input interface configured to receive a receiver identifier, a service provider identifier and a master key for the service provider; a memory configured to store a secret of the device; a processor configured to: process the receiver identifier using the secret to obtain a root key, process the service provider identifier using the root key to obtain a top key and process the master key using the top key to obtain an encrypted master key; and an output interface configured to output the encrypted master key. Also provided is a method for providing an encrypted master key to a receiver. An advantage is that the device can enable a new service provider to provide services to a receiver using an already deployed smartcard.

Abstract: A device for generating an encrypted master key. The device comprises at least one input interface configured to receive a receiver identifier, a service provider identifier and a master key for the service provider; a memory configured to store a secret of the device; a processor configured to: process the receiver identifier using the secret to obtain a root key, process the service provider identifier using the root key to obtain a top key and process the master key using the top key to obtain an encrypted master key; and an output interface configured to output the encrypted master key. Also provided is a method for providing an encrypted master key to a receiver. An advantage is that the device can enable a new service provider to provide services to a receiver using an already deployed smartcard.

Abstract: The invention relates to a chip for processing a content, comprising at least a microprocessor. Said chip includes an integrated non-volatile programmable memory for storing protection data and protected data, said protection data being intended to be used for authorizing/denying access to said protected data by said microprocessor under execution of a program. The invention allows to protect program and data dedicated to a chip-integrated conditional-access system and to protect features as external connections and downloaded data directly on the chip.

Abstract: The invention relates to a chip for processing a content, comprising at least a microprocessor. Said chip includes an integrated non-volatile programmable memory for storing protection data and protected data, said protection data being intended to be used for authorizing/denying access to said protected data by said microprocessor under execution of a program. The invention allows to protect program and data dedicated to a chip-integrated conditional-access system and to protect features as external connections and downloaded data directly on the chip.

Abstract: The invention relates to a chip for processing a content, comprising at least a microprocessor. Said chip includes an integrated non-volatile programmable memory for storing protection data and protected data, said protection data being intended to be used for authorizing/denying access to said protected data by said microprocessor under execution of a program. The invention allows to protect program and data dedicated to a chip-integrated conditional-access system and to protect features as external connections and downloaded data directly on the chip.

Abstract: The present invention relates to a video processing device for processing data corresponding to a sequence of pictures according to a predictive block-based encoding technique. Said device comprises a processing unit (20) including a reconstruction circuit (16) for reconstructing pictures from decoded data and an external memory (1) for storing reference pictures delivered by the reconstruction circuit. The processing unit further comprises a memory controller (11) for controlling data exchange between the processing unit and the external memory, a cache memory (17) for temporarily storing data corresponding to a prediction area, said data being read out from the external memory via the memory controller, and a motion compensation circuit (14) for delivering motion compensated data to the reconstruction circuit on the basis of the prediction area read out from the cache memory.

Abstract: A video decoding device receives video images encoded as video signal data for a selected one of multiple channels, for example provided by a cable TV or satellite TV service. Responsive to a request to switch from viewing a previously-selected channel to viewing a newly-selected channel, the video decoding device enters a first mode for displaying a preview representation of the video signal data received for the newly-selected channel. In this preview mode, video signal data for the newly-selected channel is received and stored, and a first available image from the video signal data is decoded and provided for display as a preview representation. The preview mode image is replaced by a real time representation of the video signal data once it is determined that the stored video signal data exceeds a threshold amount, for example an amount to compensate for maximum expected jitter.

Abstract: The invention relates to a functional system comprising a set of functions (F, F?) which are to access a collective resource (RSRC), the system including an interface (INT) arranged to implement an access scheme (AS) including at least one state (I) defined by an order of priority for an arbitration according to which the functions (F, F?) can access the collective resource (RSRC), the state (I) being characterized in that, for at least one set of at least two functions (F), the access possibilities in read mode (F_R) and the access possibilities in write mode (F_W) have different priority levels, the access possibilities in read mode having consecutive priority levels higher than the priority levels of the access possibilities in write mode.

Abstract: The invention is related to a system (2) for remotely tracking the activation of a protected software in a device (4), the system (2) comprises a plurality of devices (4) and an authorisation apparatus (6). Each device (4) comprises an electronic chip (8) having an identification number uniquely identifying the electronic chip (8). The authorisation apparatus (6) comprises an encryption processor (18) adapted to calculate an encrypted identity. Each device (4) is adapted to transmit its identification number to the authorisation apparatus (6), the authorisation apparatus (6) is adapted to record the received identification number and to transmit an encrypted identity. The device (4) contains a decryption processor (12) adapted to decrypt the transmitted encrypted identity to produce a decrypted identity and the electronic chip (8) activates the protected software only if the identification number of the device (4) corresponds to the decrypted identity.

Abstract: The present invention provides for a dual interface memory arrangement employing the checkered memory mapping formed from combined vertically and horizontally sliced memory mapping, and including 2D access means arranged for access to the mapping memory wherein the said to the access means is arranged such that the access overlaps memory mapped to both interfaces both horizontally and vertically, and which arrangement preferably provides for two DTL channels for each interface wherein a highly efficient unified memory arrangement can be achieved for all processing aspects such as CPU, audio, video and gfx processing.

Abstract: The invention relates to a secure data processing system including an unscrambling module [DSC] disposed on a dedicated hardware part [HW] of an integrated circuit and intended to unscramble a stream of data [SP] scrambled according to a scrambling key, a module [CM] for calculating an unscrambling key [Kp] disposed on said dedicated hardware part [HW] and intended to manipulate data under the control of a so-called calculation program stored on said dedicated hardware part [HW], a processor [CPU] for in particular controlling the functioning of the unscrambling [DSC] and calculation [CM] modules. Said system also includes a read only memory [SME] disposed on said dedicated hardware part [HW] for storing a secret key [Kp]. Said calculation program includes instructions for prompting said calculation module [CM] to use said secret key [L] and at least one data item [AC[n,p] or Kpc)] coming from outside the secure data processing system, in order to calculate an unscrambling key [Kp].

Abstract: Method of transferring data between a memory comprising several banks and a data processing circuit, the method comprising the steps of: producing access requests (46, 47) defining each time a type of access and designating one or several memory locations (46a-d, 47a-b) arranged in accordance with a sequence suitable for said request, processing the requests in accordance with a successive sequence so as to transfer, for each processed request, data from the designated memory location to the data processing circuit, or vice versa, the processing of a request (46) designating memory locations (46a, 46b, 46c, 46d) associated with several banks (A, B, A, B) authorizing a transfer of data between the interface and the memory locations in a sequence which is different from the sequence associated with said request.

Abstract: The present invention relates to a video processing device for processing data corresponding to a sequence of pictures according to a predictive block-based encoding technique. Said device comprises a processing unit (20) including a reconstruction circuit (16) for reconstructing pictures from decoded data and an external memory (1) for storing reference pictures delivered by the reconstruction circuit. The processing unit further comprises a memory controller (11) for controlling data exchange between the processing unit and the external memory, a cache memory (17) for temporarily storing data corresponding to a prediction area, said data being read out from the external memory via the memory controller, and a motion compensation circuit (14) for delivering motion compensated data to the reconstruction circuit on the basis of the prediction area read out from the cache memory.

Abstract: The invention relates to a method of detecting a watermark W, formed by a set of coefficients, in an information signal S, said watermark W and said information signal S being configured in the form of matrices SM M*M. The coefficients of the Fourier transform matrix of the matrix of the signal TSM and the coefficients of the Fourier transform matrix of the watermark matrix TWM are used in a calculation step CAL of the inverse transform matrix of the multiplication ITM of the transform matrix of the signal TSM and of the transform matrix of the watermark TWM, said calculation CAL being produced in sequences which each result in obtaining I columns of the inverse transform matrix of the multiplication, where M is a multiple of I and different from I. Said I columns are stored in a memory called internal memory and the detection step DET of the watermark is achieved with each sequence by detection of peaks of each set of the I columns while said I columns are present in the internal memory.

Abstract: The invention relates to a chip for processing a content, comprising at least a microprocessor. Said chip includes an integrated non-volatile programmable memory for storing protection data and protected data, said protection data being intended to be used for authorizing/denying access to said protected data by said microprocessor under execution of a program. The invention allows to protect program and data dedicated to a chip-integrated conditional-access system and to protect features as external connections and downloaded data directly on the chip.

Abstract: Access by a function to a collective resource is controlled by requiring that the function waits for a minimum number of clock cycles CLK called latency [LAT] between two successive accesses of the function. The function is further required to wait a number of cycles called penalty [PEN] which is higher than the latency between two successive accesses when a given number of successive accesses separated in time by at least the value of the latency has taken place beforehand. Registers [REG1, REG2] are decremented (or incremented) with each clock cycle and incremented (or decremented) with each access of the function to the collective resource. Tests [T1, T3, T4] are made with the contents of the registers to authorize [GRT] the access to the collective resource.

Abstract: The invention relates to a receiver [STB] intended to process at least one content [p] sent by a transmission station over a netowrk [NET] including transportation channels configured for transporting said content, characterized in that it can be connected during so-called supply events on a so-called program channel [PGC] belonging to said network [NET]. The program transportation channel [PGC] conveys according to the invention at least one content [P(SW)] including at least one software programs [SW], intended to control the receiver, coded and in a loop. The receiver [STB] is connected [CNX] to said program channel [PGC], reads and decodes [DEC] and stores said software program [SW] in a volatile memory [VME]. Control means [CNT] controlled by a so-called supply program [SPG] stored in a non-volatile memory [NVM] control the connection [CNX] of the receiver [STB] to the program channel [PGC], the reading and decoding [DEC] and the storing [STR] of the software programs [SW].

Abstract: The invention relates to a secure data processing system including an unscrambling module [DSC] disposed on a dedicated hardware part [HW] of an integrated circuit and intended to unscramble a stream of data [SP] scrambled according to a scrambling key, a module [CM] for calculating an unscrambling key [Kp] disposed on said dedicated hardware part [HW] and intended to manipulate data under the control of a so-called calculation program stored on said dedicated hardware part [HW], a processor [CPU] for in particular controlling the functioning of the unscrambling [DSC] and calculation [CM] modules. Said system also includes a read only memory [SME] disposed on said dedicated hardware part [HW] for storing a secret key [Kp]. Said calculation program includes instructions for prompting said calculation module [CM] to use said secret key [L] and at least one data item [AC[n,p] or Kpc)] coming from outside the secure data processing system, in order to calculate an unscrambling key [Kp].

Abstract: The invention consists to propose an ultra low cost basic set top box with extension module connection possibility. Instead of proposing one STB for each market, which increase the overall costs, only one STB is marketed. In addition of this unique referenced STB, a set of modules are proposed. To connect the modules, different solutions are possible. As the high volume is based on the basis STB, the cost of the add-on module has to be very low. The solution consists in a card-edge board to board connector, where the connector is on the module, and not on the STB. As consequences the main board will only include contacts footprints. The basic STB can be defined after a marketing study and includes the needed features for High-volumes market. The customer only pays for the features he wants.