Abstract: A system may include one or more processors disposed within a management network. An end-user network may contain agent instances and one or more servers. The one or more processors may be configured to perform one or more tasks. These tasks may include receiving, from the end-user network, monitor data from on or more monitoring applications on one or more agent instances; determining, based on a specification, operations to be performed on the end-user network, wherein the specification is defined by the end-user network and comprises logical directives, each logical directive including conditions that, if satisfied by the received data, define the operations; and providing, to the one or more servers, the operations.

Abstract: A system may include one or more processors disposed within a management network. An end-user network may contain agent instances and one or more servers. The one or more processors may be configured to perform one or more tasks. These tasks may include receiving, from the end-user network, monitor data from on or more monitoring applications on one or more agent instances; determining, based on a specification, operations to be performed on the end-user network, wherein the specification is defined by the end-user network and comprises logical directives, each logical directive including conditions that, if satisfied by the received data, define the operations; and providing, to the one or more servers, the operations.

Abstract: A system and method for providing distributed amplification of a plurality of input signals is disclosed. The preferred embodiment of the disclosed invention utilizes two signal path matrixes having signal combiners, hybrid combiners, and phase shifters to dissect an input signal for amplification and subsequent recombination. The unique matrixes disclosed provide for the distributed amplification of any number of input signals factorable as a product of prime numbers including an odd prime number factor, therefore reducing the number of linear power amplifiers required where a number of input signals other than a power of two are used.

Abstract: A coherent direct digital waveform synthesizer, capable of generating a waveform in response to a decimally or other non-binary related reference frequency while obtaining the advantages of the use of a binary radix phase accumulator generating binary addresses for a waveform memory. The interface between these elements include a frequency converter including a voltage controlled oscillator and a further binary radix phase accumulator in the feedback path of a phase locked loop. A binary radix related digital waveform synthesizer may be thus made to produce non-binary related frequency waveforms coherent with a non-binary radix reference frequency source, and of decimal or other non-binary radix related resolution.