Abstract: A semiconductor assembly including: a first semiconductor having a plurality of electrical contacts extending from an upper surface of the first semiconductor; a second semiconductor adjacent to the first semiconductor; and a mesh disposed between and affixed to the upper surface of the first semiconductor and the lower surface of the second semiconductor. A lower surface of the second semiconductor is electrically connected to the first semiconductor via the plurality of electrical contacts. The mesh comprises a plurality of interconnecting struts defining a plurality of openings, wherein the plurality of openings is configured to receive the plurality of electrical contacts.

Abstract: The present disclosure describes a stacked integrated circuit system that includes two integrated circuit layers stacked on opposite sides of an interposer layer. The interposer layer may include at least one integrated circuit die and an interposer portion that includes a plurality of electrically conductive pillars arranged in a laterally patterned array within the interposer layer.

Abstract: The present disclosure describes a stacked integrated circuit system that includes two integrated circuit layers stacked on opposite sides of an interposer layer. The interposer layer may include at least one integrated circuit die and an interposer portion that includes a plurality of electrically conductive pillars arranged in a laterally patterned array within the interposer layer.

Abstract: The present disclosure describes a stacked integrated circuit system that includes two integrated circuit layers stacked on opposite sides of an interposer layer. The interposer layer may include at least one integrated circuit die and an interposer portion that includes a plurality of electrically conductive pillars arranged in a laterally patterned array within the interposer layer.

Abstract: The present disclosure describes a stacked integrated circuit system that includes two integrated circuit layers stacked on opposite sides of an interposer layer. The interposer layer may include at least one integrated circuit die and an interposer portion that includes a plurality of electrically conductive pillars arranged in a laterally patterned array within the interposer layer.

Abstract: In some examples, a programmable electrical fuse includes at least one structural feature that increases a thermal gradient between an anode and a cathode of the programmable electrical fuse. For example, a device may include a semiconductor substrate, an electrically insulating layer overlying the semiconductor substrate, and a programmable electrical fuse overlying a portion of the electrically insulating layer. The programmable electrical fuse may include a cathode, an anode, and a conductor link connecting the cathode and the anode. The electrically insulating layer may define a first thickness between the semiconductor substrate and the cathode and a second thickness between the semiconductor substrate and the anode, and the first thickness being less than the second thickness.

Abstract: In some examples, a programmable electrical fuse includes at least one structural feature that increases a thermal gradient between an anode and a cathode of the programmable electrical fuse. For example, a device may include a semiconductor substrate, an electrically insulating layer overlying the semiconductor substrate, and a programmable electrical fuse overlying a portion of the electrically insulating layer. The programmable electrical fuse may include a cathode, an anode, and a conductor link connecting the cathode and the anode. The electrically insulating layer may define a first thickness between the semiconductor substrate and the cathode and a second thickness between the semiconductor substrate and the anode, and the first thickness being less than the second thickness.

Abstract: A system for certifying provenance of an alcoholic beverage includes a radio-frequency identification tag and a server. The radio-frequency identification tag, associated with a bottle containing an alcoholic beverage, periodically measures a plurality of values of an environmental condition of the bottle. The radio-frequency identification tag stores the plurality of measured values. The server receives the plurality of measured values for analysis. The server provides, via a user interface, a description of a provenance of the alcoholic beverage, the description generated responsive to an analysis of the plurality of measured values.

Abstract: A system for certifying provenance of an alcoholic beverage includes a radio-frequency identification tag and a server. The radio-frequency identification tag, associated with a bottle containing an alcoholic beverage, periodically measures a plurality of values of an environmental condition of the bottle. The radio-frequency identification tag stores the plurality of measured values. The server receives the plurality of measured values for analysis. The server provides, via a user interface, a description of a provenance of the alcoholic beverage, the description generated responsive to an analysis of the plurality of measured values.

Abstract: A method and system for modeling silicon-on-insulator shallow trench isolation stress effect is described. The method includes creating instance parameters that define dimensions of a body-tie enclosure of gate and gate-end. The instance parameters are added to a netlist. The netlist and a lookup table are used to generate a mobility multiplier. The mobility multiplier is added to the netlist and a circuit simulation program runs the netlist having the instance parameters and the mobility multiplier.

Abstract: A method of forming a body-tie. The method includes forming the body-tie during an STI scheme of an SOI process. During the STI scheme, a first trench is formed. The first trench stops before a buried oxide layer of the SOI substrate. The first trench may determine a height of body tie that is shared between at least two FETs. A second trench may also be formed within the first trench. The second trench stops in the SOI substrate. The second trench defines the location and shape of a body-tie. Once the location and shape of the body-tie are defined, an oxide is deposited above the body-tie. The deposited oxide prevents certain implants from entering the body tie. By preventing these implants, a source and a drain implant may be self-aligned to the source and drain areas without requiring the use of the photoresist mask to shield the body tie regions from the source and drain implant.

Abstract: A method and system for modeling silicon-on-insulator shallow trench isolation stress effect is described. The method includes creating instance parameters that define dimensions of a body-tie enclosure of gate and gate-end. The instance parameters are added to a netlist. The netlist and a lookup table are used to generate a mobility multiplier. The mobility multiplier is added to the netlist and a circuit simulation program runs the netlist having the instance parameters and the mobility multiplier.

Abstract: Disclosed is a method of fabricating a silicon-on-insulator (SOI) device that enables high device densities and mitigates variances in carrier mobility and saturation drain current (Idsat). The fabrication method incorporates one or more high temperature nitrogen anneal processes. The high temperature nitrogen anneal nitridizes the interfaces between the n-well and p-well silicon islands and the buried oxide layer. The high temperature nitrogen anneal also nitridizes the interfaces between the n-well and p-well silicon islands and the shallow trench isolation structure. The presence of diffused nitrogen at these interfaces substantially prevents compressive stresses on the n-well and p-well silicon islands, and substantially prevents upward bending of the n-well and p-well silicon islands, which cause variances in carrier mobility and Idsat.

Abstract: A system for providing mechanisms for certifying provenance of an alcoholic beverage includes a packing module, a shipping module, and a storage element. The packing module associates a bottle tag number stored by a first radio-frequency identification tag attached to a bottle containing an alcoholic beverage with a tag identification number of a second radio-frequency identification tag attached to a case storing the bottle containing the alcoholic beverage. The shipping module validates the association between the bottle tag number and the tag identification number and activates the second radio-frequency identification tag and activates the second radio-frequency identification tag. The storage element stores the association between the bottle tag number and the tag identification number of the second radio-frequency identification tag.

Abstract: A system for certifying provenance of an alcoholic beverage includes a radio-frequency identification tag and a server. The radio-frequency identification tag, associated with a bottle containing an alcoholic beverage, periodically measures a plurality of values of an environmental condition of the bottle. The radio-frequency identification tag stores the plurality of measured values. The server receives the plurality of measured values for analysis. The server provides, via a user interface, a description of a provenance of the alcoholic beverage, the description generated responsive to an analysis of the plurality of measured values.

Abstract: A system for providing mechanisms for authenticating contents of a bottle containing an alcoholic beverage includes a neck seal applicator module, a bottle tag attachment module, and a storage element. The neck seal applicator module attaches, to the bottle containing an alcoholic beverage, a neck seal including a neck seal identification number and an invisible security taggant. The bottle tag attachment module attaches, to the bottle containing the alcoholic beverage, a radio-frequency identification tag storing a bottle tag number. The storage element stores an association between the bottle tag number and the neck seal identification number.

Abstract: A system for authenticating contents of a bottle containing an alcoholic beverage includes a neck seal, a first reader, a second reader, and a server. The neck seal is attached to the bottle and includes a neck seal identification number and an invisible security taggant. The first reader scans the neck seal, detects the presence of the security taggant, and authenticates the neck seal. The second reader retrieves a bottle tag number from a radio-frequency identification tag. The server authenticates the contents of the bottle responsive to identifying an association between the neck seal identification number and the bottle tag number.

Abstract: Behaviors of a transistor during a dose rate event can be modeled using a circuit simulation software package. A subcircuit model replaces a transistor in a circuit design to be simulated. The subcircuit model can be in the form of a schematic-based representation or a netlist. The subcircuit model provides a model of a source junction and a drain junction in the transistor during the dose rate event. The subcircuit model also includes the size of the transistor being replaced and the dose rate of the dose rate event. Once the transistor is replaced with the subcircuit model, a dose rate simulation may be performed to determine the dose rate hardness of the circuit design.

Abstract: A method for incorporating magnetic materials in a semiconductor manufacturing process includes manufacturing a semiconductor device including interlayers and dielectric layers, depositing a magnetic layer above a semiconductor device and forming metallized contacts for connecting interlayers of the semiconductor device. With the method of the present invention, the deposition of the magnetic material is integrated with the semiconductor manufacturing process.

Abstract: A varactor has a plurality of alternating P? wells and N+ regions formed in a silicon layer. Each of the P? wells forms a first N+/P? junction with the N+ region on one of its side and a second N+/P? junction with the N+ region on the other of its sides. A gate oxide is provided over each of the P? wells, and a gate silicon is provided over each of the gate oxides. The potential across the gate silicons and the N+ regions controls the capacitance of the varactor.