Patents by Inventor Eric Feltrin

Eric Feltrin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20260074608
    Abstract: A buck-type switched-mode power supply includes a switching cell formed by a first switch configured to be periodically set to the on state by a first control signal modulated by a modulation of pulse-width or pulse-frequency modulation type. An amplifier generates an error voltage representative of a difference between a reference voltage and an output voltage of the power supply intended to be applied to the input of the amplifier. A delay circuit applies a delay to the first control signal to decreasing a difference between the error voltage and the reference voltage. A delay modulation circuit modulates the value of the delay according to a difference between the error voltage and the reference voltage.
    Type: Application
    Filed: September 2, 2025
    Publication date: March 12, 2026
    Applicant: STMicroelectronics International N.V.
    Inventors: Eric FELTRIN, David CHESNEAU, Helene ESCH
  • Publication number: 20240402743
    Abstract: A voltage regulator has a first output is connected to a capacitive element. A current source is coupled between the first output and a first node receiving a power supply voltage. The current source delivers a first DC current in response to assertion of a first binary signal. A comparator asserts a second binary signal when a first voltage on the first output is lower than a set point voltage. A first circuit controls assertion of the first signal for a first fixed time period when the second binary signal is asserted.
    Type: Application
    Filed: May 30, 2024
    Publication date: December 5, 2024
    Applicant: STMicroelectronics International N.V.
    Inventors: Helene ESCH, Jerome BOURGOIN, Eric FELTRIN
  • Patent number: 11750095
    Abstract: In an embodiment, a voltage converter includes: a first transistor coupled between a first rail configured to receive a supply voltage and a first node; and an inductance coupled between the first node and a second node configured to deliver an output voltage, wherein, at each operating cycle of the converter, the first transistor is maintained in the on state for a first time period proportional to the inverse of a voltage difference between the supply voltage and the output voltage.
    Type: Grant
    Filed: October 23, 2020
    Date of Patent: September 5, 2023
    Assignee: STMicroelectronics (Grenoble 2) SAS
    Inventors: Helene Esch, Mathilde Sie, David Chesneau, Eric Feltrin
  • Publication number: 20210126535
    Abstract: In an embodiment, a voltage converter includes: a first transistor coupled between a first rail configured to receive a supply voltage and a first node; and an inductance coupled between the first node and a second node configured to deliver an output voltage, wherein, at each operating cycle of the converter, the first transistor is maintained in the on state for a first time period proportional to the inverse of a voltage difference between the supply voltage and the output voltage.
    Type: Application
    Filed: October 23, 2020
    Publication date: April 29, 2021
    Inventors: Helene Esch, Mathilde Sie, David Chesneau, Eric Feltrin