Patents by Inventor Eric Frayssinet
Eric Frayssinet has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10522346Abstract: The invention relates to a method for producing a support for the production of a semiconductor structure based on group III nitrides, characterised in that the method comprises the steps of: formation (100) of a buffer layer (20) on a substrate (10), said buffer layer comprising an upper surface layer based on group III nitrides, and deposition (200) of a crystalline layer (30) on the buffer layer, said crystalline layer being deposited from silicon atoms so as to cover the entire surface of the upper layer based on group III nitrides. The invention also relates to a support obtained by the method, to a semiconductor structure based on the support, and to the method for the production thereof.Type: GrantFiled: January 21, 2016Date of Patent: December 31, 2019Assignee: CENTRE NATIONAL DE LA RECHERCHE SCIENTIFIQUE (CNRS)Inventors: Fabrice Semond, Eric Frayssinet, Jean Massies
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Patent number: 10361077Abstract: The invention relates to a method for producing a semiconductor structure, characterized in that the method comprises a step (201) of depositing a crystalline passivation layer continuously covering the entire surface of a layer based on group III nitrides, said crystalline passivation layer, which is deposited from a precursor containing silicon atoms and a flow of nitrogen atoms, consisting of silicon atoms bound to the surface of the layer based on group III nitrides and arranged in a periodical arrangement such that a diffraction image of said crystalline passivation layer obtained by grazing-incidence diffraction of electrons in the direction [1-100] comprises: two fractional order diffraction lines (0, ??) and (0, ??) between the central line (0, 0) and the integer order line (0, ?1), and two fractional order diffraction lines (0, ?) and (0, ?) between the central line (0, 0) and the integer order line (0, 1).Type: GrantFiled: January 21, 2016Date of Patent: July 23, 2019Assignee: CENTRE NATIONAL DE LA RECHERCHE SCIENTIFIQUE (CNRS)Inventors: Fabrice Semond, Eric Frayssinet, Jean Massies
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Publication number: 20180019120Abstract: The invention relates to a method for producing a support for the production of a semiconductor structure based on group III nitrides, characterised in that the method comprises the steps of: formation (100) of a buffer layer (20) on a substrate (10), said buffer layer comprising an upper surface layer based on group III nitrides, and deposition (200) of a crystalline layer (30) on the buffer layer, said crystalline layer being deposited from silicon atoms so as to cover the entire surface of the upper layer based on group III nitrides. The invention also relates to a support obtained by the method, to a semiconductor structure based on the support, and to the method for the production thereof.Type: ApplicationFiled: January 21, 2016Publication date: January 18, 2018Applicant: CENTRE NATIONAL DE LA RECHERCHE SCIENTIFIQUE (CNRS)Inventors: Fabrice SEMOND, Eric FRAYSSINET, Jean MASSIES
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Publication number: 20180012753Abstract: The invention relates to a method for producing a semiconductor structure, characterised in that the method comprises a step (201) of depositing a crystalline passivation layer continuously covering the entire surface of a layer based on group III nitrides, said crystalline passivation layer, which is deposited from a precursor containing silicon atoms and a flow of nitrogen atoms, consisting of silicon atoms bound to the surface of the layer based on group III nitrides and arranged in a periodical arrangement such that a diffraction image of said crystalline passivation layer obtained by grazing-incidence diffraction of electrons in the direction [1-100] comprises: two fractional order diffraction lines (0, ??) and (0, ??) between the central line (0, 0) and the integer order line (0, ?1), and two fractional order diffraction lines (0, ?) and (0, ?) between the central line (0, 0) and the integer order line (0, 1).Type: ApplicationFiled: January 21, 2016Publication date: January 11, 2018Applicant: Centre National de la Recherche Scientifique (CNRS)Inventors: Fabrice SEMOND, Eric FRAYSSINET, Jean MASSIES
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Publication number: 20160043272Abstract: A Light-emitting device comprises a monolithic matrix of III-nitride elements, the matrix comprising at least one first stack of quantum wells or of planes of quantum dots able to emit photons at at least one second wavelength by optical pumping by the photons emitted by the first stack, and a region separating the two stacks, and first and second electrodes arranged to allow an electrical current to pass through the stacks, the second stack is n-doped, the separating region comprises a tunnel junction having an n++-doped region arranged on the same side as the second stack and a p++-doped region arranged on the opposite side and the first stack is arranged between separating region and at least one n-doped layer. Method for manufacturing such device.Type: ApplicationFiled: March 12, 2014Publication date: February 11, 2016Inventors: Benjamin DAMILANO, Hyonju KIM-CHAUVEAU, Eric FRAYSSINET, Julien BRAULT, Philippe DE MIERRY, Sébastien CHENOT, Jean MASSIES
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Patent number: 9093271Abstract: The invention relates to a method for manufacturing, by means of epitaxy, a monocrystalline layer of GaN on a substrate, wherein the coefficient of thermal expansion is less than the coefficient of thermal expansion of GaN, comprising the following steps: (b) three-dimensional epitaxial growth of a layer of GaN relaxed at the epitaxial temperature, (c1) growth of an intermediate layer of BwAlxGayInzN, (c2) growth of a layer of BwAlxGayInzN, (c3) growth of an intermediate layer of BwAlxGayInzN, at least one of the layers formed in steps (c1) to (c3) being an at least ternary III-N alloy comprising aluminium and gallium, (d) growth of said layer of GaN.Type: GrantFiled: June 28, 2012Date of Patent: July 28, 2015Assignees: Soitec, Centre National de la Recherche Scientifique (CNRS)Inventors: David Schenk, Alexis Bavard, Yvon Cordier, Eric Frayssinet, Mark Kennard, Daniel Rondi
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Publication number: 20140327013Abstract: The invention relates to a method for manufacturing, by means of epitaxy, a monocrystalline layer of GaN on a substrate, wherein the coefficient of thermal expansion is less than the coefficient of thermal expansion of GaN, comprising the following steps: (b) three-dimensional epitaxial growth of a layer of GaN relaxed at the epitaxial temperature, (c1) growth of an intermediate layer of BwAlxGayInzN, growth of a layer of BwAlxGayInzN, (c3) growth of an intermediate layer of BwAlxGayInzN, at least one of the layers formed in steps (c1) to (c3) being an at least ternary III-N alloy comprising aluminium and gallium, (d) growth of said layer of GaN.Type: ApplicationFiled: June 28, 2012Publication date: November 6, 2014Applicants: SOITEC, OMMIC, CENTRE NATIONAL DE LA RECHERCHE SCIENTIFIQUE (CNRS)Inventors: David Schenk, Alexis Bavard, Yvon Cordier, Eric Frayssinet, Mark Kennard, Daniel Rondi
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Patent number: 8030101Abstract: A method of manufacturing a low defect density GaN material comprising at least two steps of growing epitaxial layers of GaN with differences in growing conditions, (a.) a first step of growing an epitaxial layer GaN on an epitaxially competent layer under first growing conditions selected to induce island features formation, followed by (b.) a second step of growing an epitaxial layer of GaN under second growing conditions selected to enhance lateral growth until coalescence.Type: GrantFiled: May 18, 2009Date of Patent: October 4, 2011Assignee: Saint-Gobain Cristaux et DetecteursInventors: Eric Frayssinet, Bernard Beaumont, Jean-Pierre Faurie, Pierre Gibart
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Publication number: 20100001289Abstract: A method of manufacturing a low defect density GaN material comprising at least two steps of growing epitaxial layers of GaN with differences in growing conditions, (a.) a first step of growing an epitaxial layer GaN on an epitaxially competent layer under first growing conditions selected to induce island features formation, followed by (b.) a second step of growing an epitaxial layer of GaN under second growing conditions selected to enhance lateral growth until coalescence.Type: ApplicationFiled: May 18, 2009Publication date: January 7, 2010Inventors: Eric Frayssinet, Bernard Beaumont, Jean-Pierre Faurie, Pierre Gibart
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Patent number: 7560296Abstract: A method of manufacturing a low defect density GaN material comprising at least two step of growing epitaxial layers of GaN with differences in growing conditions, (a.) a first step of growing an epitaxial layer GaN on an epitaxially compentent layer under first growing conditions selected to induce island features formation, followed by (b.) a second step of growing an epitaxial layer of GaN under second growing conditions selected to enhance lateral growth until coalescence.Type: GrantFiled: September 11, 2006Date of Patent: July 14, 2009Assignee: LumilogInventors: Eric Frayssinet, Bernard Beaumont, Jean-Pierre Faurie, Pierre Gibart
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Publication number: 20070072320Abstract: A method of manufacturing a low defect density GaN material comprising at least two step of growing epitaxial layers of GaN with differences in growing conditions, (a.) a first step of growing an epitaxial layer GaN on an epitaxially compentent layer under first growing conditions selected to induce island features formation, followed by (b.) a second step of growing an epitaxial layer of GaN under second growing conditions selected to enhance lateral growth until coalescence.Type: ApplicationFiled: September 11, 2006Publication date: March 29, 2007Inventors: Eric Frayssinet, Bernard Beaumont, Jean-Pierre Faurie, Pierre Gibart
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Patent number: 7118929Abstract: The present invention relates to a process for producing an epitaxial layer of gallium nitride (GaN) as well as to the epitaxial layers of gallium nitride (GaN) which can be obtained by said process. Such a process makes it possible to obtain gallium nitride layers of excellent quality by (i) forming on a surface of a substrate, a film of a silicon nitride of between 5 to 20 monolayers, functioning as a micro-mask, (ii) depositing a continuous gallium nitride layer on the silicon nitride film at a temperature ranging from 400 to 600° C., (iii) after depositing the gallium nitride layer, annealing the gallium nitride layer at a temperature ranging from 950 to 1120° C. and (iv) performing an epitaxial regrowth with gallium nitride at the end of a spontaneous in situ formation of islands of gallium nitride.Type: GrantFiled: October 28, 2003Date of Patent: October 10, 2006Assignee: LumilogInventors: Eric Frayssinet, Bernard Beaumont, Jean-Pierre Faurie, Pierre Gibart
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Publication number: 20040137732Abstract: The present invention relates to a process for producing an epitaxial layer of gallium nitride (GaN) as well as to the epitaxial layers of gallium nitride (GaN) which can be obtained by said process. Such a process makes it possible to obtain gallium nitride layers of excellent quality by (i) forming on a surface of a substrate, a film of a silicon nitride of between 5 to 20 monolayers, functioning as a micro-mask, (ii) depositing a continuous gallium nitride layer on the silicon nitride film at a temperature ranging from 400 to 600° C., (iii) after depositing the gallium nitride layer, annealing the gallium nitride layer at a temperature ranging from 950 to 1120° C. and (iv) performing an epitaxial regrowth with gallium nitride at the end of a spontaneous in situ formation of islands of gallium nitride.Type: ApplicationFiled: October 28, 2003Publication date: July 15, 2004Inventors: Eric Frayssinet, Bernard Beaumont, Jean-Pierre Faurie, Pierre Gibart