Patents by Inventor Eric Friedrichs

Eric Friedrichs has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20070024706
    Abstract: Systems and methods for providing high-quality region of interest (HQ-ROI) viewing within an overall scene by enabling one or more HQ-ROIs to be viewed in a controllable fashion, as higher quality ‘windows-within-a-window’ of regions (spatial subsets) of a scene.
    Type: Application
    Filed: May 26, 2006
    Publication date: February 1, 2007
    Inventors: Robert Brannon, Eric Friedrichs, Roger Richter, Dane Thyssen, Jason Weaver
  • Patent number: 7136388
    Abstract: A clock synchronization scheme for use with an access network element having scalable architecture. A point-to-point, high-speed communication link provided between two adjacent banks of the access network element logically interconnects a plurality of banks in a linear stack, thereby creating a stackplane hierarchy for local traffic. A primary bank includes a central master timing and frame alignment control block operable based on a master reference clock. A secondary bank immediately coupled to the primary bank is operable to synchronize its local clock based on a delay preset signal provided by the primary bank. Each remaining secondary bank is operable to synchronize its local clock based on the delay preset signal provided by a local master timing control block disposed in the secondary bank immediately above it.
    Type: Grant
    Filed: June 27, 2002
    Date of Patent: November 14, 2006
    Assignee: Alcatel
    Inventors: Eric Friedrichs, Bracy James Blackburn
  • Publication number: 20040001516
    Abstract: A clock synchronization scheme for use with an access network element having scalable architecture. A point-to-point, high-speed communication link provided between two adjacent banks of the access network element logically interconnects a plurality of banks in a linear stack, thereby creating a stackplane hierarchy for local traffic. A primary bank includes a central master timing and frame alignment control block operable based on a master reference clock. A secondary bank immediately coupled to the primary bank is operable to synchronize its local clock based on a delay preset signal provided by the primary bank. Each remaining secondary bank is operable to synchronize its local clock based on the delay preset signal provided by a local master timing control block disposed in the secondary bank immediately above it.
    Type: Application
    Filed: June 27, 2002
    Publication date: January 1, 2004
    Inventors: Eric Friedrichs, Bracy James Blackburn