Patents by Inventor Eric Geisler

Eric Geisler has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20260141123
    Abstract: An apparatus and method for extending IO device security protocols to integrated processors. For example, an example processor package comprises: a plurality of cores to execute instructions; an interconnect fabric coupled to the plurality of cores; memory interface circuitry coupled to the interconnect fabric, the memory interface circuitry to couple the plurality of cores to one or more memories; a root complex comprising: security circuitry operable as a root of trust (ROT) and a bridge to the interconnect fabric, the security circuitry to establish secure communication with one or more Root Complex Integrated Endpoint (RCiEP) devices integral to the processor package; and a Security Protocol and Data Model (SPDM) engine of the security circuitry to provide RCiEP encryption and SPDM protocol services to establish secure communication channels with each RCiEP device.
    Type: Application
    Filed: March 28, 2025
    Publication date: May 21, 2026
    Applicant: Intel Corporation
    Inventors: Arie AHARON, Kapil SOOD, Rupin H. VAKHARWALA, Eric GEISLER, Tessil THOMAS, Shalini SHARMA, Lakshmi SRINIVAS, Asher ALTMAN
  • Publication number: 20240220622
    Abstract: Circuitry and methods for implementing address translation extensions for confidential computing hosts are described.
    Type: Application
    Filed: December 30, 2022
    Publication date: July 4, 2024
    Inventors: Utkarsh Y. Kakaiya, Eric Geisler, Rupin H. Vakharwala, Michael Prinke, David Koufaty
  • Publication number: 20230205562
    Abstract: Systems, methods, and apparatuses for implementing input/output extensions for trust domains are described. In one example, a hardware processor includes a hardware processor core comprising a trust domain manager to manage one or more hardware isolated virtual machines as a respective trust domain with a region of protected memory, and input/output memory management unit (IOMMU) circuitry coupled between the hardware processor core and an input/output device, wherein the IOMMU circuitry is to, for a request from the input/output device for a direct memory access of a protected memory of a trust domain, allow the direct memory access in response to a field in the request being set to indicate the input/output device is in a trusted computing base of the trust domain.
    Type: Application
    Filed: December 23, 2021
    Publication date: June 29, 2023
    Inventors: Abhishek Basak, Vedvyas Shanbhogue, Rajesh Sankaran, Rupin Vakharwala, Utkarsh Y. Kakaiya, Eric Geisler, Ravi Sahita
  • Publication number: 20160350250
    Abstract: Techniques for handling unaligned data in a computing system are described herein. The techniques may include receiving data from an input/output (I/O) device, through an I/O interface. The data may be padded by adding values to the data at the I/O interface if the data is unaligned with respect to that computing system such that a consumer of the data associated with the I/O device ignores the added values.
    Type: Application
    Filed: December 23, 2013
    Publication date: December 1, 2016
    Applicant: Intel Corporation
    Inventors: Anil Vasudevan, Eric Geisler, Marshall Marc Millier