Abstract: A method for forming a ultralow dielectric constant layer with controlled biaxial stress is described incorporating the steps of forming a layer containing Si, C, O and H by one of PECVD and spin-on coating and curing the film in an environment containing very low concentrations of oxygen and water each less than 10 ppm. A material is also described by using the method with a dielectric constant of not more than 2.8. The invention overcomes the problem of forming films with low biaxial stress less than 46 MPa.

Abstract: A method for forming a ultralow dielectric constant layer with controlled biaxial stress is described incorporating the steps of forming a layer containing Si, C, O and H by one of PECVD and spin-on coating and curing the film in an environment containing very low concentrations of oxygen and water each less than 10 ppm. A material is also described by using the method with a dielectric constant of not more than 2.8. The invention overcomes the problem of forming films with low biaxial stress less than 46 MPa.

Abstract: A method for forming a ultralow dielectric constant layer with controlled biaxial stress is described incorporating the steps of forming a layer containing Si, C, O and H by one of PECVD and spin-on coating and curing the film in an environment containing very low concentrations of oxygen and water each less than 10 ppm. A material is also described by using the method with a dielectric constant of not more than 2.8. The invention overcomes the problem of forming films with low biaxial stress less than 46 MPa.

Abstract: Disclosed is a procedure to coat the free surface of Cu damascene lines by a 1-5 nm thick element prior to deposition of the inter-level dielectric or dielectric diffusion barrier layer. The coating provides protection against oxidation, increases the adhesion strength between the Cu and dielectric, and reduces interface diffusion of Cu. In addition, the thin cap layer further increases electromigration Cu lifetime and reduces the stress induced voiding. The selective elements can be directly deposited onto the Cu embedded within the under layer dielectric without causing an electric short circuit between the Cu lines. These chosen elements are based on their high negative reduction potentials with oxygen and water, and a low solubility in and formation of compounds with Cu.

Abstract: Liquid crystal display (LCD ) panels can be formed rapidly by this method, which involves depositing liquid crystal (LC) in a central region of one substrate, depositing a fillet of epoxy material in a continuous loop along the periphery of one substrate to surround the LC material, placing a second glass substrate over the first substrate and in continuous contact with the epoxy fillet, and then causing the fillet to set by curing or cross-linking. Advantageously, the epoxy fillet can be hardened by scanning it with an infrared or ultraviolet laser focussed to avoid heating the LC material. Alternatively, the epoxy fillet can be formed from two-component epoxy by depositing one fillet of each component on the peripheral region of one of the substrates, joining the substrates to merge the two components, and then vibrating the joined substrates to enhance commingling and setting of the two components into a strong hermetic seal.

Abstract: A substantially defect-free, low-k dielectric film having improved adhesion is provided by (a) applying a silane coupling agent containing at least one polymerizable group to a surface of a substrate so as to provide a substantially uniform coating of said silane-coupling agent on said substrate; (b) heating the substrate containing the coating of the silane-coupling agent at a temperature of about 90° C. or above so as to provide a surface containing Si—O bonds; (c) rinsing the heated substrate with a suitable solvent that is effective in removing any residual silane-coupling agent; and (d) applying a dielectric material to the rinsed surface containing the Si—O bonds.

Abstract: A substantially defect-free, low-k dielectric film having improved adhesion is provided by (a) applying a silane coupling agent containing at least one polymerizable group to a surface of a substrate so as to provide a substantially uniform coating of said silane-coupling agent on said substrate; (b) heating the substrate containing the coating of the silane-coupling agent at a temperature of about 90° C. or above so as to provide a surface containing Si—O bonds; (c) rinsing the heated substrate with a suitable solvent that is effective in removing any residual silane-coupling agent; and (d) applying a dielectric material to the rinsed surface containing the Si—O bonds.

Abstract: The invention relates to a process for making an integrated circuit device comprising (i) a substrate, (ii) metallic circuit lines positioned on the substrate, and (iii) a dielectric material positioned on the circuit lines. The dielectric material comprises the condensation product of silsesquioxane in the presence of a photosensitive or thermally sensitive base generator.

Abstract: A method is described by which the mechanical strength of chips of semiconductor devices can be controlled by appropriate wafer finishing and sorted by knowledge of the finishing method and chip and wafer geometry. The control and sorting derive from a knowledge of the geometry of the striations remaining on the back of chips after the wafer-grinding finishing step.

Abstract: A serpentine pattern has been found to be effective at interrupting propagation of delamination cracks in thin film layers. The ring is provided on a semiconductor chip to suppress crack propagation from the chip edge. The ring is effective even though it is filled with metal, the serpentine pattern providing significantly increased area as compared with a standard linear crack stop that the energy for crack propagation is dissipated. In addition to serpentines, pattern features such as staggered filled ring patterns and connected rings will also be effective at reducing the propagation of delamination cracks from edge to active area by virtue of the increased area of interaction between the crack and the crack stop.

Abstract: The invention relates to a process for making an integrated circuit device comprising (I) a substrate, (ii) metallic circuit lines positioned on the substrate, and (iii) a dielectric material positioned on the circuit lines. The dielectric material comprises the condensation product of silsesquioxane precursor in the presence of an organic amine having a boiling point greater than 150.degree. C.

Abstract: A method is described by which the mechanical strength of chips of semiconductor devices can be controlled by appropriate wafer finishing and sorted by knowledge of the finishing method and chip and wafer geometry. The control and sorting derive from a knowledge of the geometry of the striations remaining on the back of chips after the wafer-grinding finishing step.