Abstract: A system and method for implementing a graph database to analyze and monitor a status of an enterprise computer network is provided. In one example, a plurality of sensors can be inputted into sensor interface in which all of the data associated with the sensors in converted into a common data format. The data can be parsed into a data model that contains nodes and edges in order to generate a graph database model that can allow a network analyst to analyze the real-time status of a computer network. The graph database model can include multiple layers including an infrastructure layer, a cyber threats layer, a cyber posture layer, and a mission readiness layer. The graph database model can also be queried by a user using a domain-specific query language, so as to provide a user-friendly syntax in generating queries.

Abstract: A system and method for implementing a graph database to analyze and monitor a status of an enterprise computer network is provided. In one example, a plurality of sensors can be inputted into sensor interface in which all of the data associated with the sensors in converted into a common data format. The data can be parsed into a data model that contains nodes and edges in order to generate a graph database model that can allow a network analyst to analyze the real-time status of a computer network. The graph database model can include multiple layers including an infrastructure layer, a cyber threats layer, a cyber posture layer, and a mission readiness layer. The graph database model can also be queried by a user using a domain-specific query language, so as to provide a user-friendly syntax in generating queries.

Abstract: A method for fabricating a semiconductor device includes forming an SiGe region. The SiGe region can be an embedded source and drain region, or a compressive SiGe channel layer, or other SiGe regions within a semiconductor device. The SiGe region is exposed to an SC1 solution and excess surface portions of the SiGe region are selectively removed. The SC1 etching process can be part of a rework method in which overgrowth regions of SiGe are selectively removed by exposing the SiGe to and SC1 solution maintained at an elevated temperature. The etching process is carried out for a period of time sufficient to remove excess surface portions of SiGe. The SC1 etching process can be carried out at elevated temperatures ranging from about 25° C. to about 65° C.

Abstract: A method for fabricating a semiconductor device includes forming an SiGe region. The SiGe region can be an embedded source and drain region, or a compressive SiGe channel layer, or other SiGe regions within a semiconductor device. The SiGe region is exposed to an SC1 solution and excess surface portions of the SiGe region are selectively removed. The SC1 etching process can be part of a rework method in which overgrowth regions of SiGe are selectively removed by exposing the SiGe to and SC1 solution maintained at an elevated temperature. The etching process is carried out for a period of time sufficient to remove excess surface portions of SiGe. The SC1 etching process can be carried out at elevated temperatures ranging from about 25° C. to about 65° C.