Abstract: An apparatus to facilitate hardware acceleration of resource barriers in a graphics environment is disclosed. The apparatus includes resource barrier hardware circuitry for processing cores and a graphics pipeline to: receive a resource barrier instruction to transition a resource utilized by the graphics pipeline from a first usage to a second usage; responsive to the resource barrier instruction, cause a draw group marker having a current draw group count to be sent to an end of the graphics pipeline to track completion of each stage of the graphics pipeline; increment the current draw group count to a new draw group count for each new draw group of the graphics pipeline; and determine that a current signal stage of the graphics pipeline is complete for a current draw group responsive to a done count for the current signal stage being less than or equal to the current draw group count.

Abstract: An apparatus to facilitate a pixel reorder buffer in a graphics environment is disclosed. The apparatus includes shared hardware circuitry for processing cores comprising pixel reorder buffer (PRB) circuitry that is to: query a dependency status of threads corresponding to the messages received from the at least one execution resource to determine whether the messages correspond to one of non-dependent threads or dependent threads; populate a non-dependent first-in-first-out (FIFO) of the PRB circuitry with thread identifiers (IDs) of the non-dependent threads corresponding to the messages; populate a dependent FIFO of the PRB circuitry with thread IDs of the dependent threads corresponding to the messages; and arbitrate reads between the non-dependent FIFO and the dependent FIFO based on an oldest thread ID in the non-dependent FIFO and the dependent FIFO, wherein the thread IDs corresponding to a dependency cleared indication are available for read arbitration from the dependent FIFO.

Abstract: Methods, systems and apparatuses may provide for technology that identifies that a first thread group of a pixel location is associated with a first shading rate, identifies that a second thread group of the pixel location is associated with a second shading rate, wherein the first shading rate is different from the second shading rate. The technology marks a dependency of the first thread group on the second thread group.

Abstract: Methods, systems and apparatuses provide for graphics processor technology that determines whether a first cache line allocated for early depth testing overlaps a second cache line allocated for late depth testing, and when the first cache line overlaps the second cache line, switches the first cache line to be allocated for late depth testing, and bypasses an early depth test for the first cache line. The technology can also compare coordinates of the first cache line with the coordinates of the second cache line, where an overlap is determined when coordinates for at least one pixel in the first cache line match coordinates for at least one pixel in the second cache line. Additionally, the technology can also perform early depth testing on each pixel in the first cache line when the first cache line does not overlap any existing cache lines allocated for late depth testing.

Abstract: Methods, systems and apparatuses provide for graphics processor technology that generates attribute plane coefficients based on barycentric coefficients, wherein the attribute plane coefficients are generated on a per polygon basis, and interpolates one or more pixel attributes based on the attribute plane coefficients. In one example, the technology excludes the barycentric coefficients from one or more per pixel operations.

Abstract: Methods, systems and apparatuses provide for graphics processor technology that generates attribute plane coefficients based on barycentric coefficients, wherein the attribute plane coefficients are generated on a per polygon basis, and interpolates one or more pixel attributes based on the attribute plane coefficients. In one example, the technology excludes the barycentric coefficients from one or more per pixel operations.

Abstract: Methods, systems and apparatuses provide for graphics processor technology that determines whether a first cache line allocated for early depth testing overlaps a second cache line allocated for late depth testing, and when the first cache line overlaps the second cache line, switches the first cache line to be allocated for late depth testing, and bypasses an early depth test for the first cache line. The technology can also compare coordinates of the first cache line with the coordinates of the second cache line, where an overlap is determined when coordinates for at least one pixel in the first cache line match coordinates for at least one pixel in the second cache line. Additionally, the technology can also perform early depth testing on each pixel in the first cache line when the first cache line does not overlap any existing cache lines allocated for late depth testing.

Abstract: Methods, systems and apparatuses may provide for technology that identifies that a first thread group of a pixel location is associated with a first shading rate, identifies that a second thread group of the pixel location is associated with a second shading rate, wherein the first shading rate is different from the second shading rate. The technology marks a dependency of the first thread group on the second thread group.

Abstract: Embodiments are generally directed to a multi-phase architecture for multiple rate pixel shading. An embodiment of an apparatus includes one or more processor cores, the one or more processing cores including a graphics pipeline and a memory to store data for graphics processing, the data including pixel data. The graphics pipeline includes a multi-phase shader for processing of pixel data, the multi-phase shader including multiple rendering stages, the rendering stages including at least a first stage for a first granularity and a second stage for a second, different granularity, the second rendering granularity being a finer granularity than the first rendering granularity. The multi-phase shader is structured to provide a hierarchy for image rendering, wherein pixel data is received at a rendering stage having a coarsest rendering granularity, with remaining pixel data being provided through the hierarchy to one or more rendering stages having finer rendering granularities.

Abstract: Embodiments are generally directed to a multi-phase architecture for multiple rate pixel shading. An embodiment of an apparatus includes one or more processor cores, the one or more processing cores including a graphics pipeline and a memory to store data for graphics processing, the data including pixel data. The graphics pipeline includes a multi-phase shader for processing of pixel data, the multi-phase shader including multiple rendering stages, the rendering stages including at least a first stage for a first granularity and a second stage for a second, different granularity, the second rendering granularity being a finer granularity than the first rendering granularity. The multi-phase shader is structured to provide a hierarchy for image rendering, wherein pixel data is received at a rendering stage having a coarsest rendering granularity, with remaining pixel data being provided through the hierarchy to one or more rendering stages having finer rendering granularities.

Abstract: A safety system for a compartment of a vehicle includes an occupant sensor for sensing an occupant within the compartment of the vehicle, a vehicle-based control, and a wireless transmitter of the vehicle. The control is responsive to the occupant sensor. The control controls transmission by the wireless transmitter. The wireless transmitter may transmit to a receiver located external of the vehicle upon detection by the occupant sensor of the presence of an occupant within the compartment of the vehicle.

Abstract: A compass compensation system is provided for automatically and continuously calibrating an electronic compass for a vehicle, without requiring an initial manual calibration or preset of the vehicle magnetic signature. The system initially adjusts a two axis sensor of the compass in response to a sampling of at least one initial data point. The system further calibrates the compass by sampling data points that are substantially opposite to one another on a plot of a magnetic field and averaging an ordinate of the data points to determine a respective zero value for the Earth magnetic field. The system also identifies a change in magnetic signature and adjusts the sensor assembly.

Abstract: A touch sensor interfaces with a control system or controlled device using two wires. The output of the touch sensor controls an output switch.

Abstract: A safety sensing system for a compartment of a vehicle is operable to detect an occupant within the vehicle compartment. The system may be operable to sense ambient conditions in the vehicle compartment, and may generate a control signal in response to the sensed conditions. The system may actuate indicators to notify operators of the vehicle that there is a person or animal detected in the compartment. Optionally the system may open the vehicle compartment in response to a detection of an occupant and the sensed conditions. The safety system includes a false trigger protection means that limits or reduces false detections of a person or animal within the compartment.

Abstract: A system for converting the tail light signals of a towing vehicle to control the tail lights of a towed vehicle. The converter includes full buffering for all input signals thereby minimizing any loading effect caused by the converter or the towed vehicle. Also, the converter employs an override circuit so that the towed vehicle brake lights operate even if the emergency flashers have been activated on the towing vehicle.