Patents by Inventor Eric Hu
Eric Hu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11979696Abstract: In some examples, a system includes an article of personal protective equipment (PPE) having at least one sensor configured to generate a stream of usage data; and an analytical stream processing component comprising: a communication component that receives the stream of usage data; a memory configured to store at least a portion of the stream of usage data and at least one model for detecting a safety event signature, wherein the at least one model is trained based as least in part on a set of usage data generated by one or more other articles of PPE of a same type as the article of PPE; and one or more computer processors configured to: detect the safety event signature in the stream of usage data based on processing the stream of usage data with the model, and generate an output in response to detecting the safety event signature.Type: GrantFiled: May 5, 2023Date of Patent: May 7, 2024Assignee: 3M Innovative Properties CompanyInventors: Steven T. Awiszus, Eric C. Lobner, Michael G. Wurm, Kiran S. Kanukurthy, Jia Hu, Matthew J. Blackford, Keith G. Mattson, Ronald D. Jesme, Nathan J. Anderson
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Patent number: 11954758Abstract: This disclosure provides systems, devices, apparatus, and methods, including computer programs encoded on storage media, for dynamic wave pairing. A graphics processor may allocate one or more GPU workloads to one or more wave slots of a plurality of wave slots. The graphics processor may select a first execution slot of a plurality of execution slots for executing the one or more GPU workloads. The selection may be based on one of a plurality of granularities. The graphics processor may execute, at the selected first execution slot, the one or more GPU workloads at the one of the plurality of granularities.Type: GrantFiled: February 24, 2022Date of Patent: April 9, 2024Assignee: QUALCOMM IncorporatedInventors: Yun Du, Andrew Evan Gruber, Zilin Ying, Chunling Hu, Baoguang Yang, Yang Xia, Gang Zhong, Chun Yu, Eric Demers
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Patent number: 11950713Abstract: Systems disclosed herein are directed to a display stand unit for a retail environment. The display stand unit includes a base having an interior and a display stand. The display stand includes a stem that connects to and extends upwardly from the base and a receiving surface that is suspended above and spaced away from the base by the stem. The receiving surface is configured to releasably hold an electronic device above and spaced away from the base. The display stand unit further includes a security cable that extends out from the base. The security cable is configured to attach to the electronic device to movably secure the electronic device to the base. The display stand unit further includes a retractor disposed within the interior of the base and connected to the security cable. The retractor automatically retracts the security cable.Type: GrantFiled: February 4, 2022Date of Patent: April 9, 2024Assignee: Apple Inc.Inventors: David Samuel Kumka, Clayton R. Woosley, Daniel S. Foster, Eric Weijia Wang, Gregory R. Ritter, Joshua Adams, Christopher Hu, Priya K. Nambiar
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Publication number: 20240113279Abstract: A battery cell that include sulfide cathodes are described with examples being suitable for operation at elevated temperatures. Also described are methods of making and using these battery cells.Type: ApplicationFiled: November 30, 2023Publication date: April 4, 2024Inventors: Liangbing HU, Chengwei WANG, Eric D. WACHSMAN, Venkataraman THANGADURAI
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Publication number: 20240087909Abstract: Embodiments of improved process flows and methods are provided in the present disclosure to control fin height and channel area in a fin field effect transistor (FinFET) having gaps of variable CD. More specifically, the present disclosure provides improved transistor fabrication processes and methods that utilize a wet etch process, instead of a dry etch process, to remove the oxide material deposited within the gaps formed between the fins of a FinFET. By utilizing a wet etch process, the improved transistor fabrication processes and methods described herein provide a means to adjust or individually control the fin height of one or more the fins, thereby providing greater control over the channel area of the FinFET.Type: ApplicationFiled: September 12, 2022Publication date: March 14, 2024Inventors: Shan Hu, Eric Chih-Fang Liu, Henan Zhang, Sangita Kumari, Peter Delia
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Publication number: 20240087950Abstract: Embodiments of improved process flows and methods are provided in the present disclosure to form air gaps between metal interconnects. More specifically, the present disclosure provides improved process flows and methods that utilize a wet etch process to form recesses between metal interconnects formed on a patterned substrate. Unlike conventional air gap integration methods, the improved process flows and methods described herein utilize the critical dimension (CD) dependent etching provided by wet etch processes to etch an intermetal dielectric material formed between the metal interconnects at a faster rate than the intermetal dielectric material is etched in surrounding areas of the patterned substrate. This enables the improved process flows and methods described herein to form recesses (and subsequently form air gaps) between the metal interconnects without using a dry etch process.Type: ApplicationFiled: September 12, 2022Publication date: March 14, 2024Inventors: Shan Hu, Eric Chih-Fang Liu, Henan Zhang, Sangita Kumari, Peter Delia
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Publication number: 20240087907Abstract: The present disclosure combines chemical mechanical polishing (CMP), wet etch and deposition processes to provide improved processes and methods for planarizing an uneven surface of a material layer deposited over a plurality of structures formed on a substrate. A CMP process is initially used to smooth the uneven surface and provide complete local planarization of the material layer above the plurality of structures. After achieving complete local planarization, a wet etch process is used to etch the material layer until a uniform recess is formed between the plurality of structures and the material layer is provided with a uniform thickness across the substrate. In some embodiments, an additional material layer may be deposited and a second CMP process may be used to planarize the additional material layer to provide the substrate with a globally planarized surface.Type: ApplicationFiled: September 12, 2022Publication date: March 14, 2024Inventors: Shan Hu, Eric Chih-Fang Liu, Henan Zhang, Sangita Kumari, Peter Delia
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Publication number: 20240079778Abstract: An electronic device may be provided with an antenna having a resonating element formed from a segment of peripheral conductive housing structures. A speaker may be aligned with first openings in the segment. A vent may be aligned with second openings in the segment. A connector may protrude through the segment. A trace combiner for the antenna may be patterned onto the speaker and may be coupled to the segment. Tuners for the antenna may be disposed on first and second flexible printed circuits that extend along opposing sides of the connector. The tuners may be controlled through the speaker. The second flexible printed circuit may extend along the vent. The vent may have a vent cowling with a cut-out region next to the tuner on the second flexible printed circuit.Type: ApplicationFiled: August 30, 2023Publication date: March 7, 2024Inventors: Enrique Ayala Vazquez, Ming-Ju Tsai, Yiren Wang, Yuan Tao, Hao Xu, Sidharath Jain, Haozhan Tian, Yuancheng Xu, Eric W. Bates, Peter A. Dvorak, Harlan S. Dannenberg, Rees S. Parker, Obinna O. Onyemepu, Victor C. Lee, Han Wang, Hongfei Hu
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Publication number: 20240079779Abstract: An electronic device may be provided with a sensor module and an antenna having an antenna arm, ground structures, and a tuner. The tuner may be mounted to a printed circuit overlapping the sensor module. A spring may be mounted to the printed circuit and may couple the tuner to a conductive chassis of the sensor module. The sensor module may include optical sensors that gather sensor data through a display and may form ground paths from the tuner to the ground structures. Conductive interconnect structures such as springs may exert biasing forces in different directions to couple the ground paths to different layers of the ground structures. This may serve to couple the antenna to the ground structures as close as possible to the tuner, thereby maximizing antenna performance, despite the presence of the sensor module.Type: ApplicationFiled: August 30, 2023Publication date: March 7, 2024Inventors: Yuan Tao, Yiren Wang, Ana Papio Toda, Jingni Zhong, Han Wang, Hao Xu, Hongfei Hu, Mattia Pascolini, Eric W. Bates, Peter A. Dvorak, Allegra Shum
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Publication number: 20240079777Abstract: An electronic device may be provided with an antenna having a resonating element formed from a segment of peripheral conductive housing structures. A speaker may be aligned with first openings in the segment. A vent may be aligned with second openings in the segment. A connector may protrude through the segment. A trace combiner for the antenna may be patterned onto the speaker and may be coupled to the segment. Tuners for the antenna may be disposed on first and second flexible printed circuits that extend along opposing sides of the connector. The tuners may be controlled through the speaker. The second flexible printed circuit may extend along the vent. The vent may have a vent cowling with a cut-out region next to the tuner on the second flexible printed circuit.Type: ApplicationFiled: August 30, 2023Publication date: March 7, 2024Inventors: Yiren Wang, Yuan Tao, Hao Xu, Hongfei Hu, Enrique Ayala Vazquez, Ming-Ju Tsai, Sidharath Jain, Haozhan Tian, Yuancheng Xu, Harlan S Dannenberg, Eric W Bates, Peter A Dvorak, Nicole E Cazares, Obinna O Onyemepu, Victor C Lee, Han Wang
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Patent number: 11845723Abstract: The present disclosure provides diacylglycerol kinase modulating compounds, and pharmaceutical compositions thereof, for treating cancer, including solid tumors, and viral infections, such as HIV or hepatitis B virus infection. The compounds can be used alone or in combination with other agents.Type: GrantFiled: December 18, 2020Date of Patent: December 19, 2023Assignee: Gilead Sciences, Inc.Inventors: Masaaki Sawa, Mai Arai, Ryoko Nakai, Hirokazu Matsumoto, Catherine Pugh, Eric Hu, Juan Guerrero, Jesse Jacobsen, Jonathan William Medley, Jie Xu, Latesh Lad, Leena Patel, Michael Graupe, Qingming Zhu, Stephen Holmbo, Tetsuya Kobayashi, Will Watkins, Yasamin Moazami, Suet C. Yeung, Julian A. Codelli, Heath A. Weaver
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Publication number: 20230043136Abstract: Described herein are compounds of Formula (I) and tautomers and pharmaceutical salts thereof, compositions and formulations containing such compounds, and methods of using and making such compounds.Type: ApplicationFiled: March 9, 2022Publication date: February 9, 2023Inventors: Ondrej Baszczynski, Milan Dejmek, Yunfeng Eric Hu, Petr Jansa, Eric Lansdon, Richard L. Mackman, Petr Simon
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Patent number: 11532489Abstract: A substrate is provided having a top side and a bottom side, having redistribution layers therein, having at least one copper pillar connected to the redistribution layers on the top side and at least one copper pillar connected to the redistribution layers on the bottom side, and having at least one cavity extending partially into the bottom side of the substrate. At least one passive component is mounted onto the copper pillar on the top side and embedded in a molding compound. At least one silicon die is mounted in the cavity wherein electrical connections are made between the at least one silicon die and the at least one passive component through the redistribution layers. At least one solder ball is mounted on the at least one copper pillar on the bottom side of the substrate to provide package output.Type: GrantFiled: June 11, 2021Date of Patent: December 20, 2022Assignee: Dialog Semiconductor (UK) LimitedInventors: Ernesto Gutierrez, III, Jesus Mennen Belonio, Jr., Eric Hu, Melvin Martin, Jerry Li, Francisco Vergara Cadacio
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Publication number: 20220324866Abstract: The present disclosure provides diacylglycerol kinase modulating compounds, and pharmaceutical compositions thereof, for treating cancer, including solid tumors, and viral infections, such as HIV or hepatitis B virus infection. The compounds can be used alone or in combination with other agents.Type: ApplicationFiled: December 18, 2020Publication date: October 13, 2022Inventors: Masaaki SAWA, Mai ARAI, Ryoko NAKAI, Hirokazu MATSUMOTO, Catherine PUGH, Eric HU, Juan GUERRERO, Jesse JACOBSEN, Jonathan William MEDLEY, Jie XU, Latesh LAD, Leena PATEL, Michael GRAUPE, Qingming ZHU, Stephen HOLMBO, Tetsuya KOBAYASHI, Will WATKINS, Yasamin MOAZAMI, Suet C. YEUNG, Julian A. CODELLI, Heath A. WEAVER
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Publication number: 20220241281Abstract: The present disclosure provides a compound of Formula (I): or a pharmaceutically acceptable salt thereof as described herein. The present disclosure also provides pharmaceutical compositions comprising a compound of Formula I, processes for preparing compounds of Formula I, therapeutic methods for treating cancers.Type: ApplicationFiled: October 8, 2021Publication date: August 4, 2022Inventors: Gregory Chin, Michael O`Neil Hanrahan Clarke, Xiaochun Han, Tim Hansen, Yunfeng Eric Hu, Dmitry Koltun, Ryan McFadden, Michael R. Mish, Eric Q. Parkhill, David Sperandio, Lianhong Xu, Hai Yang
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Publication number: 20220139850Abstract: A panel type fan-out wafer level package with embedded film type capacitors and resistors is described. The package comprises a silicon die at a bottom of the package wherein a top side and lateral sides of the silicon die are encapsulated in a molding compound, at least one redistribution layer connected to the silicon die through copper posts contacting a top side of the silicon die, at least one embedded capacitor material (ECM) sheet laminated onto the package, and at least one embedded resistor-conductor material (RCM) sheet laminated onto the package wherein the at least one redistribution layer, capacitors in the at least one ECM, and resistors in the at least one RCM are electrically interconnected.Type: ApplicationFiled: January 17, 2022Publication date: May 5, 2022Inventors: Ernesto Gutierrez, III, Jesus Mennen Belonio, JR., Shou Cheng Eric Hu
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Patent number: 11304948Abstract: Described herein are compounds of Formula (I) and tautomers and pharmaceutical salts thereof, compositions and formulations containing such compounds, and methods of using and making such compounds.Type: GrantFiled: December 18, 2019Date of Patent: April 19, 2022Assignees: Gilead Sciences, Inc.Inventors: Ondrej Baszczynski, Milan Dejmek, Yunfeng Eric Hu, Petr Jansa, Eric Lansdon, Richard L. Mackman, Petr Simon
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Patent number: 11309255Abstract: A system in package is provided comprising an embedded trace substrate having redistribution layers therein, at least one passive component mounted on one side of the embedded trace substrate and embedded in a first molding compound, at least one silicon die mounted on an opposite side of the embedded trace substrate and embedded in a second molding compound wherein electrical connections are made between the at least one silicon die and the at least one passive component through the redistribution layers, and solder balls mounted through openings in the second molding layer to the redistribution layers wherein the solder balls provide package output.Type: GrantFiled: March 26, 2020Date of Patent: April 19, 2022Assignee: Dialog Semiconductor (UK) LimitedInventors: Jesus Mennen Belonio, Jr., Shou Cheng Eric Hu, Ian Kent, Ernesto Gutierrez, III, Melvin Martin, Rajesh Subraya Aiyandra
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Patent number: 11251132Abstract: A molded interconnection substrate system in package is achieved comprising a molding compound having redistribution layers therein, at least one first active or passive component mounted on one side of the molded interconnection substrate and embedded in a top molding compound, at least one second active or passive component mounted in a cavity on an opposite side of the molded interconnection substrate wherein electrical connections are made between the at least one first active or passive component and the at least one second active or passive component through the redistribution layers and solder balls mounted in openings in the molded interconnection substrate to the redistribution layers wherein the solder balls provide package output.Type: GrantFiled: August 8, 2019Date of Patent: February 15, 2022Assignee: Dialog Semiconductor (UK) LimitedInventors: Chehan Jerry Li, Jesus Mennen Belonio, Jr., Shou-Cheng Eric Hu
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Patent number: 11239185Abstract: A panel type fan-out wafer level package with embedded film type capacitors and resistors is described. The package comprises a silicon die at a bottom of the package wherein a top side and lateral sides of the silicon die are encapsulated in a molding compound, at least one redistribution layer connected to the silicon die through copper posts contacting a top side of the silicon die, at least one embedded capacitor material (ECM) sheet laminated onto the package, and at least one embedded resistor-conductor material (RCM) sheet laminated onto the package wherein the at least one redistribution layer, capacitors in the at least one ECM, and resistors in the at least one RCM are electrically interconnected.Type: GrantFiled: November 3, 2017Date of Patent: February 1, 2022Assignee: Dialog Semiconductor (UK) LimitedInventors: Ernesto Gutierrez, III, Jesus Mennen Belonio, Jr., Shou Cheng Eric Hu